Hello everybody!
Wanted to ask please if it is common and possible to use Timer555 chip as an external clock generator for D-Flip Flop.
I checked the D-FF datasheet and saw that 'Buffered Clock' is written there but I couldn't find the meaning of it.
Thanks in advance for your help!

 

Hello everybody!
Wanted to ask please if it is common and possible to use Timer555 chip as an external clock generator for D-Flip Flop.
I checked the D-FF datasheet and saw that 'Buffered Clock' is written there but I couldn't find the meaning of it.
Thanks in advance for your help!

Yes. A 555-timer circuit output can be used as a CLOCK source. The supply voltage of the 555-timer should be the same as the rest of the circuit. Use a CMOS version of the 555-timer IC, such as LMC555, TLC555, ICM7555. Always insert a 100nF ceramic capacitor and a 10μF electrolytic capacitor across the power rails at the 555-timer IC.

 

Yes. A 555-timer circuit output can be used as a CLOCK source. The supply voltage of the 555-timer should be the same as the rest of the circuit. Use a CMOS version of the 555-timer IC, such as LMC555, TLC555, ICM7555. Always insert a 100nF ceramic capacitor and a 10μF electrolytic capacitor across the power rails at the 555-timer IC.

Thank you!
Is LM555 ok? I must use devices from college's warehouse stock and I see in the components list LM555 and not LMC555.

 

LM555 draws higher currents from the supply rail. It puts excessive noise on to the rails. It is important that you place the 100nF and 10μF capacitors as close to the Vcc and GND pins of the LM555 IC.

 

Thank you!
Is LM555 ok? I must use devices from college's warehouse stock and I see in the components list LM555 and not LMC555.

Lmc555 is a Cmos version and will take lower current consumption and less spikes from the supply, add the capacitors too

 

The LM555 output high voltage is generate by a Darlington stage that, per the data sheet, goes to only 2.75V minimum with a 5V supply, which is marginal for many 5V logic families.
A 1kΩ resistor from the output to V+ will help pull the output up to near 5V with a low current (logic input) load.

Which logic family are you using for the flip-flop?

 

The LM555 output high voltage is generate by a Darlington stage that, per the data sheet, goes to only 2.75V minimum with a 5V supply, which is marginal for many 5V logic families.
A 1kΩ resistor from the output to V+ will help pull the output up to near 5V with a low current (logic input) load.

Which logic family are you using for the flip-flop?

I'm going to use TTL 7474 D-FF

 

I'm going to use TTL 7474 D-FF

Since the minimum logic high for standard bipolar (not CMOS) TTL is 2.4V, the minimum LM555 high should be sufficient.