Hello everyone,
for the following circuit, I need to complete a truth table and determine the logic function that the circuit implements.
I'm not sure whether Q6 is able to be in SAT mode while Q3 is in REVERSE and Q4+Q5 both are OFF, since on the one hand maybe Q6 can conduct through BE junction diode independently on Q4/Q5 states, but on the other hand if Q6 conducts through BE junction, then It forces Q9 to conduct and if Q4+Q5 are off maybe Q7 can conduct with Q8 and I get a short in the output.
Please help me with such confusing circuits. In addition I'm not sure how to determine Q7 states when Q6 is SAT and Q4+Q5 are off or Q6 is OFF and Q4/Q5 are in SAT, also my table does not much the table in the solution.
My table:


The table in the solution:


Thanks in advance!

 

Hello everyone,
for the following circuit, I need to complete a truth table and determine the logic function that the circuit implements.
I'm not sure whether Q6 is able to be in SAT mode while Q3 is in REVERSE and Q4+Q5 both are OFF, since on the one hand maybe Q6 can conduct through BE junction diode independently on Q4/Q5 states, but on the other hand if Q6 conducts through BE junction, then It forces Q9 to conduct and if Q4+Q5 are off maybe Q7 can conduct with Q8 and I get a short in the output.
Please help me with such confusing circuits. In addition I'm not sure how to determine Q7 states when Q6 is SAT and Q4+Q5 are off or Q6 is OFF and Q4/Q5 are in SAT, also my table does not much the table in the solution.
My table:
View attachment 298309

The table in the solution:
View attachment 298310

Thanks in advance!

What circuit?

 

What circuit?

Oh my bad I forgot to attach it :/

 

Do you understand how TTL works (circuit-wise that is)?

 

Do you understand how TTL works (circuit-wise that is)?

Apparently not good enough, in class tutorials they show us simple examples. This circuit is from a final exam.
Can you explain me please what am I missing?

 

There are eight possible input conditions. The job is to trace through the circuit for each possible input combination and for each possible input combination whether the output is high or low.

For example, what is the state of the output when all of the inputs are low?

 

There are eight possible input conditions. The job is to trace through the circuit for each possible input combination and for each possible input combination whether the output is high or low.

Oh I know that part. I've attached to this thread the truth table that I started to fill, my confusing part is with Q7, can you give a look at what I wrote and at my table?

 

At which input state?

 

Q7’s output will cause Q8 to be on, and Q9 off, making the output high, unless there is too high of a load -that’s why R7 is there.

Yeah, but how do I determine the state of Q7 in a case that Q6 is OFF and Q4+Q5 are ON.

 

Short answer is that since Q6 is off the only path to ground from R4 is through the bases of Q7 and Q8, so the emitter of Q8 will be high. Since Q6 is off there will be no base current to turn Q9 on, so there is no pull-down.

 

Oh I know that part. I've attached to this thread the truth table that I started to fill, my confusing part is with Q7, can you give a look at what I wrote and at my table?

As you can see in the printed truth table that I attached, they say for "110" that Q6 is OFF and Q9 is SAT, how came?
Also for combination "001", Q6=SAT and Q9=OFF.

 

Yeah, but how do I determine the state of Q7 in a case that Q6 is OFF and Q4+Q5 are ON.

If Q6 is OFF. then what does it matter what Q4 or Q5 is?

 

As you can see in the printed truth table that I attached, they say for "110" that Q6 is OFF and Q9 is SAT, how came?
Also for combination "001", Q6=SAT and Q9=OFF.

As I explained in your other thread, when analyzing digital circuits, the state of each transistor is often simplified to either being OFF or ON. In the case of a BJT, a transistor is considered to be saturated if there is a sufficient source of base current, even if no base current can actually flow because some other transistor in series with the collector or emitter is cut off.

Think of them as simple switches.

 

If Q6 is OFF. then what does it matter what Q4 or Q5 is?

If Q4/Q5 are SAT, can't they avoid Q7 conduction?

 

As I explained in your other thread, when analyzing digital circuits, the state of each transistor is often simplified to either being OFF or ON. In the case of a BJT, a transistor is considered to be saturated if there is a sufficient source of base current, even if no base current can actually flow because some other transistor in series with the collector or emitter is cut off.

Think of them as simple switches.

I see. But which current can cause Q9 to be SAT when Q6 is OFF? and how the way to determine it?

 

my confusing part is with Q7

Hi 122,
Not sure sure what you mean, perhaps it is this configuration?
E
https://www.electronics-tutorials.ws/transistor/darlington-transistor.html

 

Hi 122,
Not sure sure what you mean, perhaps it is this configuration?
E
https://www.electronics-tutorials.ws/transistor/darlington-transistor.html

Hey friend,
Nope, I know that Q7 & Q8 are a Darlington couple, I meant that I'm not sure how to determine the working mode of Q7 dependently on Q4, Q5 and Q6. For example, if we look at the printed table that I attached for "001", they claim that Q6 is SAT and Q9 is OFF, how can it happen? in this case of "001" both Q6 and Q7 are "ON", then how can I know which of Q8/Q9 will conduct in the output, they can't conduct simultaneously.

 

But which current can cause Q9 to be SAT when Q6 is OFF?

None.
If Q6 is off, then there is no path to turn Q9 on.
So anything else being on has no effect on the output.

 

None.
If Q6 is off, then there is no path to turn Q9 on.
So anything else being on has no effect on the output.

Then "110" state in the printed table is a mistake. right?

 

hi 122,
If I have modelled the circuit correctly, the table does not match the circuit.???
1st and 2nd displayed.

E