Hey guys
Im working with nand flashes and stm32h7 fmc to connect with.
I had a lot of questions so i decided to open this thread to ask and share information together.
As i understood we have to implement some software thing to use nand flash including Bad_Block management ,ECC ,wear leveling ,etc.
There are some misunderstood that i have so i start to ask them.
First is that in the micron mt29f1G08 it says that the bad blocks are marked before shipping. And before using the block we have to check the first page that i believe that is the spare area an if the contents were 0xFF it is good block, otherwise it is considered bad block.
So i checked the first block of my nand flash and it wasnt 0xFF so i marked it as a bad block.
But looking in details on datasheet that it mentions " The first block (physical block address 00h) for each CE# is guaranteed to be valid with ECC when shipped from the factory. ".
So actually the first block must not be a bad block but why is the spare area not 0xFF?
Im working with nand flashes and stm32h7 fmc to connect with.
I had a lot of questions so i decided to open this thread to ask and share information together.
As i understood we have to implement some software thing to use nand flash including Bad_Block management ,ECC ,wear leveling ,etc.
There are some misunderstood that i have so i start to ask them.
First is that in the micron mt29f1G08 it says that the bad blocks are marked before shipping. And before using the block we have to check the first page that i believe that is the spare area an if the contents were 0xFF it is good block, otherwise it is considered bad block.
So i checked the first block of my nand flash and it wasnt 0xFF so i marked it as a bad block.
But looking in details on datasheet that it mentions " The first block (physical block address 00h) for each CE# is guaranteed to be valid with ECC when shipped from the factory. ".
So actually the first block must not be a bad block but why is the spare area not 0xFF?
