Yeah, not surprising. You are basically trying to make a walking clucking chicken from McNuggetz.
You can draw the schematic in Eeschema, associate the same ref designations with the same footprints (Icon that looks like an op amp and a 6 pin dip), make the netlist (Icon sez "Net"), and open that in PCBnew. That allows lots of error checking.
I've never used JCL for assembly (just for boards) but generally for assembly you need to provide something called centroid data, basically X, Y and theta for each part so a pick and place machine knows where and what orientation to put it down.