So I'm in a computer architecture class, and I'm stuck on a question about Multiplexers:
A device accepts natural binary numbers (N3N2N1N0) in the range 0000 to 1111 that represent 0 to 15. The output of the circuit, PRIME, is true(1) if the input to the circuit represents a prime number and is false (0) otherwise. A prime number is an integer that is greater than 1 and is divisible only by itself and 1. Zero and one are not prime numbers.
And this is what I need to do:
Design a circuit for this device using:
-An appropriately sized decoder
-An appropriately sized MUX where N1 is used to drive the inputs
to the MUX. Draw the MUX as a block diagram.
How exactly would I go about doing this? I'm not even sure where to start, tbh.
A device accepts natural binary numbers (N3N2N1N0) in the range 0000 to 1111 that represent 0 to 15. The output of the circuit, PRIME, is true(1) if the input to the circuit represents a prime number and is false (0) otherwise. A prime number is an integer that is greater than 1 and is divisible only by itself and 1. Zero and one are not prime numbers.
And this is what I need to do:
Design a circuit for this device using:
-An appropriately sized decoder
-An appropriately sized MUX where N1 is used to drive the inputs
to the MUX. Draw the MUX as a block diagram.
How exactly would I go about doing this? I'm not even sure where to start, tbh.