Here's the simulation of a CD4929 4-bit counter (I didn't have models for the ones I mentioned, but it's an alternate that works the same):
Note how the clock pulses advance the three outputs' (Q1, Q2, Q3) count through the binary sequence from 0 to 7 (000 to 111), and then starts over.
Those three signals would be connected to the three address control inputs (A, B, C) on the multiplexer.
(Note that if you wanted to change the play sequence you could add a switch to reverse a couple of the inputs to the multiplexer thus, for example, connect the counter outputs to A,C,B instead of A,B,C)