MOSFET gate resistor

Thread Starter

Matt74

Joined Jun 29, 2019
30
Hello, I am designing a MOSFET-based switch to power the analog part of my circuit only when needed in order to save some power and extend the battery life. I am not an EE so I apologise if my questions are a bit naive...

My (rather limited) understanding of MOSFET is that they should not require a gate resistor however I read here SE thread that it could a good idea to prevent ringing. In the same thread they also mention a high impedance resistor to ground. The schematics would therefore look like this (AEN is one of the digital outputs of my microcontroller and A0 is an analog input, there are separate analog and digital power rails):
Screenshot 2020-01-04 at 20.59.33.png
Q1 Did I pick the right MOSFET ?
I selected a DMN2005LP4K-7 (datasheet) for the following reasons:
  • Rds(on) is very low (400mOhm @2.7V) and my main goal is precisely to save power.
  • The gate threshold voltage is very low (0.5-0.9V) so it should be full on with a logic high of 2.8V.
  • VDD=VDDA=2.8V so with Vds=20V and Vgs=10V I am on the safe side
  • The total resistance (FSR + R3) is so high that I shouldn't have more than 1mA going through so a max drain current of 300mA is plenty and for the same reason 400mW of power dissipation is way more than I will ever need.

Q2 Do I really need R1 and R2 ?
AEN will be forced down by the microcontroller so do I really need the pull down resistor R2? As for R1...

Thanks a lot !
 

Thread Starter

Matt74

Joined Jun 29, 2019
30
For a high side switch you need a P-MOSFET, not an N-MOSFET
I am glad I asked the question ! :)))

Should it look like this ? : (by the way my R3 value was wrong but that does not change the point)
Screenshot 2020-01-05 at 07.04.30.png
I briefly read about it and it seems that high or low side switch are both fine for my application. The reason I should prefer an N to a P MOSFET is that they offer better performance for a lower price, right ?

I am not doing high speed switching (the MOSFET will be ON for a few hundred us every 20ms)

@ci139
Thank you for the links. I had a hard time finding relevant information in the first document (but again I am no EE) as for the second very instructive but very technical too. It reminded me of the speech about Donnelly nut spacing and cracked system rim-riding grip configuration by Leslie Claret in "The Patriot". Great series by the way.

Thanks
 

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Thread Starter

Matt74

Joined Jun 29, 2019
30
Depends.
Where does A0 go to?
What is the rest of the circuit?
A0 is an analog input of an nRF52 module. The rest of the circuit is just battery charger LDO and so on. There is no digital logic (I mean stuff like I2C or SPI connected ICs). My understanding is that for low current low voltage circuits with low risk of short circuits high or low switches are fine. There won't be any exposed parts or wires except for those going to the force sensitive resistor (FSR). As a matter of facts everything will be on a single PCB in a plastic enclosure and there will be only two wires going to and from the FSR over a short distance (10cm).

What do you think of my component choice ? Was I right to go for one of the lowest RdsON/Vgs th and then make sure the rest of the specs were compatible with my circuit ?

Also I read in several occasions (above and here) that the gate resistor is good practice to prevent ringing and radiated EMI (which would be a problem since I am using a Bluetooth module). Could you explain why you think R1 is not necessary ?

Cheers !
 
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ericgibbs

Joined Jan 29, 2010
14,126
hi Matt,
You say, A0 is an analog input of an nRF52 module.
Is it just a Control signal.?
Your circuit and description is confusing, please post more info. ;)
E
 

Thread Starter

Matt74

Joined Jun 29, 2019
30
hi Matt,
You say, A0 is an analog input of an nRF52 module.
Is it just a Control signal.?
Your circuit and description is confusing, please post more info. ;)
E
The flag "A0" in my schematics refers to P0.02/AIN0 of the nRF52840 chip. It is an analog input and I honestly don't know how else I can describe it. It is one of the input of the chip's Analog-Digital-Converter (there is an internal reference voltage) and it is connected to the analog signal I want to measure (i.e. voltage across the FSR).
"AEN" is a digital output (i.e. logic high/low) P0.07 of the nRF52840

nRR52840.jpg
 

ericgibbs

Joined Jan 29, 2010
14,126
hi Matt,
Looking at the circuit in post #4.
When AEN is High the Drain of the MOSFET will be pulled LOW.
This will create a voltage drop across FSR1.
The Voltage difference between VDDA and the Voltage at the junction of FSR and R3 is being sampled by the A0 pin.

Are you trying to stop the current drawn thru FSR from VDDA in order to save power.?
E
 

Thread Starter

Matt74

Joined Jun 29, 2019
30
Hi Eric,
That's right. The whole point is to save power. Without any switch there would be a constant current flow through FSR+R3 while I only need it ON 1% of the time (200us every 20ms). Am I doing it right ?

Back to the gate resistor issue (because it is still puzzling me) I found (in this forum) this very nice application note AN6048 which explains how Rg can be calculated. Again including a gate resistor seems a pretty unanimous advice so I am eager to read crutschow's explanation as to why it is not necessary. So I did the calculation for the few MOSFET I originally selected based on RdsON, Vgs th, Vgs and Vds:

gate resistor.jpg

The minimum Rg value is pretty high compared to most conventional MOSFET (I selected extremely low RdsON and Vgs th). Now I start to worry about the voltage drop across Rg if it is too big...

Cheers

Edit: Well I think I found my answer (regarding crutschow's comment) I should't need any Rg because I am not doing any high frequency switching, where the RC time constant of the gate is close to the operating period. Did I get that right ?
 
Last edited:

ericgibbs

Joined Jan 29, 2010
14,126
hi Matt,
When driving a MOSFET Gate from an 'expensive' logic device, I always add a low value resistor in series, just in case the MOSFET dies with an internal Drain/Gate short.
The resistor should limit the current into the expensive device drive pin and hopefully it should survive.

The other good reason for the resistor, is as per AN6048.

With ref to 'Rg', I guess you will not be switching the AEN line at a fast rate.? If so a mid range Rg would be my choice.

Have you checked the Rdon value for the range of Drain/Source currents that could occur, due to VDDA level change.
E

Look here:
https://forum.allaboutcircuits.com/...resistance-rg-in-a-mosfet.131161/post-1082812

@OBW0549
 

MrChips

Joined Oct 2, 2009
24,601
You can use a PNP transistor as a high-side switch.
Emitter to Vs, collector to load.
Drive the base high via a 1kΩ resistor to power down. Drive base low to enable power.
 

crutschow

Joined Mar 14, 2008
28,156
Could you explain why you think R1 is not necessary ?
At the low frequency of you application, gate ringing should not be a problem, but it doesn't hurt to have one.

Note that a low-side switch will apply the full VDDA voltage through FSR1 to A0 when the MOSFET is off.
I don't think you want that.
I would use a high-side switch.

Note that a high-side MOSFET switch requires a gate voltage of VDDA to turn off, so you may need an NPN transistor driver for its gate.
 

Thread Starter

Matt74

Joined Jun 29, 2019
30
At the low frequency of you application, gate ringing should not be a problem, but it doesn't hurt to have one.
Thanks, with a bit of additional reading I managed to figure out why you were saying that in your first post. You're 100% right, not required to prevent ringing in my case.


Note that a low-side switch will apply the full VDDA voltage through FSR1 to A0 when the MOSFET is off.
I don't think you want that.
I would use a high-side switch.
Note that a high-side MOSFET switch requires a gate voltage of VDDA to turn off, so you may need an NPN transistor driver for its gate.
Back to the design stage I guess... What would be the advantage of having a P-MOSFET driven by a NPN transistor over a single PNP as Mr Chips suggested ?

Thanks for your valuable comments

Cheers

M
 
Last edited:

Chris65536

Joined Nov 11, 2019
270
Note that a low-side switch will apply the full VDDA voltage through FSR1 to A0 when the MOSFET is off.
I don't think you want that.
Is this really a problem though? It's an A/D input, and is only sampled after the MOSFET has turned on. When it's inactive, how is having it at 0V vs. 2.8V really any different? There shouldn't be any current in either case.
 

ci139

Joined Jul 11, 2016
1,696
https://devzone.nordicsemi.com/tags/nrf52840← post your ←question about how to "init"/sense fast the FSR1 at P0.02 -- you may need to match it for P0.02 speciffics - it may depend on your board layout / or you may need to alter your board layout for
FSR+R3 while I only need it ON 1% of the time (200us every 20ms). Am I doing it right ?
the extra mosfet use is still a bit misty
P0.07 is UART CTS/TRACECLK ▼ Pg.503/Pg.517 configurable
P0.17 is GPIO https://infocenter.nordicsemi.com/pdf/nRF52840_PS_v1.1.pdf Pg.148 Electrical specs Pg.156 options : ±500µA/±3mA/±5mA , ±2÷±9mA
..
you can cope with lesser capacity
Edit :: but the output power of the nRF52840 and PDM init time might become an issue - highly optimistic test :
MCU-Dbl-r.png
 
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Thread Starter

Matt74

Joined Jun 29, 2019
30
Is this really a problem though? It's an A/D input, and is only sampled after the MOSFET has turned on. When it's inactive, how is having it at 0V vs. 2.8V really any different? There shouldn't be any current in either case.
Can I configure the analog input as « disconnected « in between reads ? That way no current at all could flow through
 
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