I'm trying to get an Exclusive OR gate in a mainly analogue circuit simulation. I filled in "value" as shown, but its output remains at 2.5V.

Prefix    A
InstName    A1
SpiceModel    XOR
Value    Vhigh=5 Vlow=0 Trise=1u Tfall=1u Rout=45 Cout=5p Td=10n
Value2   
SpiceLine   
SpiceLine2

Is this the right way to deal with the unused inputs?

 

Morning Ian,
My understanding is that unused inputs can be left unconnected in the Digital Mode.

E

 

hi @Ian0
Checkout, at about 8min 45sec from the start on this video.
E

 

Many thanks. I’m obviously far too well trained to leave inputs floating, even on a ”behavioural” gate.
What’s the extra input on the bottom of the symbol do?
The instructions I found said that was the point to tie all unused inputs. Can’t believe everything you find on the internet, although the rest of it seemed to be correct!

 

hi,
Its 'internally connected to 0v, but it can have an applied voltage or a series resistor to 0V in order to measure the sense of the load output current.
Check at 7m 30s on the video.
E

 

The instructions I found said that was the point to tie all unused inputs.

This is what the LTspice Help for the A devices says:-
"A. Special Functions
Unused inputs and outputs are to be connected to terminal 8. The digital device compiler recognizes that as a flag that that terminal is not used and removes it from the simulation. This leads to the potentially confusing situation where AND gates act differently when an input is grounded or at zero volts. If ground is the gate's common, then the grounded input is not at a logic false condition, but simply not part of the simulation."

Like Eric, I've found the devices work ok with unused inputs left unconnected. Perhaps that slows the sim imperceptibly?

 

This is what the LTspice Help for the A devices says:-
"A. Special Functions
Unused inputs and outputs are to be connected to terminal 8. The digital device compiler recognizes that as a flag that that terminal is not used and removes it from the simulation. This leads to the potentially confusing situation where AND gates act differently when an input is grounded or at zero volts. If ground is the gate's common, then the grounded input is not at a logic false condition, but simply not part of the simulation."

Like Eric, I've found the devices work ok with unused inputs left unconnected. Perhaps that slows the sim imperceptibly?

That’s how I connected it, and the output was stuck at 2.5V. I didn’t even know it could do a 2.5V output! It was behaving as though it had been tristated, and the position of terminal 8 is exactly where one would draw the output enable on a buffer.
I wonder if the connection to pin 8 made it believe that it no longer had a low impedance between output and ground and was therefore unable to sink and source current.

 

Thanks everyone. Just leaving the spare inputs floating makes it work. (Whenever did you hear that said about a logic gate?)

Anyway . . . I had had a really good idea for a solar MPPT circuit, and I have now simulated it, and it doesn’t work. Never mind - that’s what SPICE is for - saving me the trouble of building something that doesn’t work.

 

hi @Ian0
This LTS lib master zip maybe of interest to you, ref the Solar MPPT. [under examples]
E