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Hi everyone,
I am looking for help creating a behavioral SPICE macromodel for a custom VCXO/oscillator. My goal is to model only the external behavior (not the internal transistor-level design) and have the model match datasheet specifications as closely as possible.
The device has 4 pins:
can anyone help me with this?
I am looking for help creating a behavioral SPICE macromodel for a custom VCXO/oscillator. My goal is to model only the external behavior (not the internal transistor-level design) and have the model match datasheet specifications as closely as possible.
The device has 4 pins:
- Pin 1: VC (Control Voltage)
- Pin 2: GND
- Pin 3: OUT
- Pin 4: VCC
- CMOS 3.3 V output
- 20 MHz nominal frequency
- VOH = 90% of VCC
- VOL = 10% of VCC
- 50% duty cycle
- 2 ns rise time
- 2 ns fall time
- Output amplitude dependent on load impedance and capacitance
- Supply current (ICC) behavior
- Output characteristics changing with VCC variation
- Pulling sensitivity = 15 ppm/V
- VC range = 0 V to 3.3 V
- 1 Hz offset: -83 dBc/Hz
- 10 Hz offset: -114 dBc/Hz
- 100 Hz offset: -141 dBc/Hz
- 1 kHz offset: -158 dBc/Hz
- 10 kHz offset: -160 dBc/Hz
- 100 kHz offset: -160 dBc/Hz
- 1 MHz offset: -160 dBc/Hz
- Fundamental @ 20 MHz = +10 dBm
- 2nd Harmonic @ 40 MHz = -30 dBm
- 3rd Harmonic @ 60 MHz = 0 dBm
can anyone help me with this?
