Typo? did you man 250-750mA

Yes.

 

To minimize the effect of any trace resistance, you could remove the common connection for R6 and connect it directly to the bottom wire (not trace) of R3, and run the connection from U1(-) directly to the top wire of R2 (a Kelvin connection).
This would likely require the cutting of a couple traces and adding small wires (wire-wrap wire is commonly used) in their place on your PCB.

 

How much does the voltage at the COLLECTOR of Q1 change between no load and full load?? Measured with the bottom of the ten ohm resistor as the reference connection. OR is this all in a simulation???

 

How much does the voltage at the COLLECTOR of Q1 change between no load and full load??

Since a transistor collector has a high impedance in its active state, I don't see how a change on its voltage would have a significant effect on the emitter voltage(??).

OR is this all in a simulation???

AND we all know how badly that works!!!

 

Since a transistor collector has a high impedance in its active state, I don't see how a change on its voltage would have a significant effect on the emitter voltage(??).
AND we all know how badly that works!!!

The collector is directly tied to the +Vcc supply, and so a change in the supply voltage will change everything, since the base drive is fed by the opamp having the same supply. And so if the supply voltage drops so will all of the regulated voltages.

 

The collector is directly tied to the +Vcc supply, and so a change in the supply voltage will change everything, since the base drive is fed by the opamp having the same supply. And so if the supply voltage drops so will all of the regulated voltages.

Not really.
Due to negative feedback, the voltage across R3 equals the voltage at U1's input voltage, which equals U2's output voltage. which is determined by its differential input voltage, none of which are significantly affected by the supply voltage.

The only thing causing a change would be the power-supply rejection of the op amps, and that's normally very high.

WANT me to simulate it?

 

Often there is a parameter "power supply rejection" provided for linear ICs. And certainly power supply droop will have some effect. It may not show up in simulation unless that aspect is included in the opamp model, which is really not likely. And certainly the basic equations do not reflect power supply variations.

 

Often there is a parameter "power supply rejection" provided for linear ICs. And certainly power supply droop will have some effect. It may not show up in simulation unless that aspect is included in the opamp model, which is really not likely. And certainly the basic equations do not reflect power supply variations.

Yes, I'm well aware of that parameter.
The op amp power rejection ratio is 120dB (below) so any output change from the power supply voltage change is negligible compared to what the TS observed.
My sim of the TS's circuit showed an output variation of about 1.5μV/V or -116dB, which is really close to the spec value, contrary to your negative expectations.

 

Hello!

If I use the feedback resistor of some kilo ohms, does it work maintaining the output voltage with or without Load?.

Thank you!

 

Hello!

If I use the feedback resistor of some kilo ohms, does it work maintaining the output voltage with or without Load?.

Thank you!

We already explained what your likely problem is.
Do you not accept that?

The value of the feedback resistors doesn't affect the error unless the resistor values are large enough to cause a voltage drop due to the op amp input bias current.

 

We already explained what your likely problem is.
Do you not accept that?

The value of the feedback resistors doesn't affect the error unless the resistor values are large enough to cause a voltage drop due to the op amp input bias current.

I was going to say exactly the same thing. Whilst you were typing it I was looking up the bias current, which is 1nA.

 

How much resistance does it take to drop 50mV at 0.5A? Is it possible there is that much resistance between where you are measuring and the output?

 

We already explained what your likely problem is.
Do you not accept that?

The value of the feedback resistors doesn't affect the error unless the resistor values are large enough to cause a voltage drop due to the op amp input bias current.

So, Do I need to use the resistor at the input of the opamp to control the input current?. DO I need to use the large feedback resistor to over come this problem.

 

So, Do I need to use the resistor at the input of the opamp to control the input current?. DO I need to use the large feedback resistor to over come this problem.

For a 1nA input current, just make sure that your feedback resistors are less than 1GΩ.

I think it has been made abundantly clear what the problem is, and faffing about with the values of the feedback resistors isn't going to fix it.

 

What might fix the discrepancy is a 4-wire Kelvin connection to the load.

 

Perhaps the TS has all of us on ignore.

 

What might fix the discrepancy is a 4-wire Kelvin connection to the load.

Or perhaps a few minutes thinking about the pcb layout. . .

 

For a 1nA input current, just make sure that your feedback resistors are less than 1GΩ.

I think it has been made abundantly clear what the problem is, and faffing about with the values of the feedback resistors isn't going to fix it.

How do you know/calculated the input current 1nA?.

I'm not fully understand that do I need to tune the feedback resistor values (or) does not to be used the feedback resistor?.

 

How do you know/calculated the input current 1nA?.

It says so in the datasheet

I'm not fully understand that do I need to tune the feedback resistor values (or) does not to be used the feedback resistor?.

You need the correct RATIO of resistances to give the required output voltage. The resistors need to be less than 1GΩ to prevent the input bias current from introducing errors.

 

It says so in the datasheet

You need the correct RATIO of resistances to give the required output voltage. The resistors need to be less than 1GΩ to prevent the input bias current from introducing errors.

1nA current is the input offset current, Right?. It is not a input bias current. why do we need to consider input offset current here?