Lowest power logic level signal invert

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MrSoftware

Joined Oct 29, 2013
2,188
For a battery powered application, what is the most energy efficient way to invert a signal that is high (~+5v) most of the time? I can make a NOT gate with a mosfet and some big resistors, but it seems that would just be continuously dumping power. Is there a better way?

The use case is a circuit that will sleep 99% of the time (1-2 minute sleep time), waking occasionally to do some work (0.5 to 1 second work time) then go back to sleep. To sleep the circuit we're actually turning off the voltage regulator, then using the trigger from a coin cell powered real time clock to enable the voltage regulator during work times. The problem is the RTC output is normally high and pulls low when the clock expires, while the voltage regulator requires a logic low to be off and a logic high to be turned on. So I need to invert the signal from the RTC, but in a way that doesn't kill my battery.


Edit: What if I used a pair of logic level mosfets, one n-channel and one p-channel?
 
Last edited:

OBW0549

Joined Mar 2, 2015
3,566
Just use one section of a 74HC04 hex inverter, or one section of a 74HC14 hex Schmitt trigger inverter. Essentially zero power dissipation, unlike a MOSFET with drain pullup resistor.
 

crutschow

Joined Mar 14, 2008
34,285
As OBW0549 suggested
Most CMOS logic draws only sub-microamps of leakage current in a static state (high or low) so you can have many logic gates operating at a low frequency or static condition using no significant current (often less than the self-discharge current of the battery).
The CD4000 series of CMOS gates will work from 3V to over 15V.
 
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