Hi, I have a question on how to implement a certain logic schematic.
I have to use 4 to 1 muxes to implement a full adder.
For the assignment I need to use 8 full adders to convert an 8 bit binary number to its 2s complement
I am mostly confused on how to implement the adder, can anyone help? I can probably get the rest once the adder is implemented.
I have to use 4 to 1 muxes to implement a full adder.
For the assignment I need to use 8 full adders to convert an 8 bit binary number to its 2s complement
I am mostly confused on how to implement the adder, can anyone help? I can probably get the rest once the adder is implemented.