Hi all,

I am working on a multi-board design where a simplified block diagram is shown below. The FPGA's transceiver block uses 0.95VDD and PHY uses 3.3VDD. So I need to use AC coupling caps to route SGMII between the FGPA and PHY.

I've seen multiple app notes about location of the AC coupling caps (TX side, RX side, or anywhere) but none of them provide any theoretical explanation. The FPGA's datasheet says it's ok to put the caps anywhere.

In summary I think there are 4 possibilities of placing AC coupling caps.
I'm sure each option has its pros and cons. Which way is most desirable way?

 

What is the signalling rate and are you treating this as an impedance-controlled transmission line?

 

What is the signalling rate and are you treating this as an impedance-controlled transmission line?

It's going to be SGMII interface, so 625MHz and yes the traces are impedance controlled to 50ohms

 

From what I've read, SGMII implements a transmission line in each direction. My gut feel is the capacitors should be at the Tx end of the line to minimise reflections and make line matching easier, though the documentation is unclear on this...