LMP91000 Potentiostat Circuitry Clarification Needed

I am going through the datasheet of LMP91000.The functional block diagram is given below.





In page no 13 7.3 Feature Description --> 7.3.1 Potentiostat Circuitry.The below statement is given.

The core of the LMP91000 is a potentiostat circuit. It consists of a differential input amplifier used to compare the potential between the working and reference electrodes to a required working bias potential (set by the Variable Bias circuitry).

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As per the block diagram what I understood is comparison between Reference electrode and variable bias taking place.

May I know how the comparison between working electrode and bias voltage is happening?Working electrode is connected to the input of TIA.

The next thing I need to know is,in the same section you can see the statement given below.

A Transimpedance Amplifier connected to the working electrode, is used to provide an output voltage that is proportional to the cell current. The working electrode is held at virtual ground (Internal ground) by the transimpedance amplifier.

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How the working electrode is held at virtual groung?One end of the TIA is connected to WE and the other end is connected to a voltage divider.How virtual GND is obtained here.By virtual ground did they mean providing an offset to WE by a value provided by VREF DIVIDER