I've download a number of different models for the LM339 and LM2903 voltage comparators but they all seem to invert the output signal.

The output is open collector and should pull to zero when the comparator output goes high but the model pulls to zero when the comparator output is low.

Attached is an exerpt from the TI datasheet showing a basic comparator circuit and a sample of the output. I have re-created this circuit in LTSpice and as you can see the output signal is inverted.

I think this is a problem with the model but I have no idea how to change the model or make the circuit behave as the the real device behaves.

Any advice appreciated.

The following is one of the models I have tried

* | LM293, LM393, LM2903, LM2903V, NCV2903
* | Comparator MACRO-MODEL
* | Designed in pSpice Version 9.2
* |
* | The content of this model is subject to change
* | without notice and may not be modified or altered
* | without permission from ON Semiconductor. This model
* | has been carefully checked and is believed to be
* | accurate, however ON Semiconductor does not assume
* | liability for the use of this model or the results
* | obtained from using it.
*
* Features: - Wide Single-Supply Range: 2.0 Vdc to 36 Vdc
* - Split-Supply Range: +/-1.0 Vdc to +/-18 Vdc
* - Very Low Current Drain Independent of
* Supply Voltage: 0.4 mA
* - Low Input Bias Current: 25 nA
* - Low Input Offset Current: 5.0 nA
* - Low Input Offset Voltage: 5.0 mV (max) LM293/393
* - Input Common Mode Range to Ground Level
* - Differential Input Voltage Range Equal to Power
* Supply Voltage
* CONNECTIONS: NON-INVERTING INPUT
* | INVERTING INPUT
* | | POSITIVE POWER SUPPLY
* | | | NEGATIVE POWER SUPPLY
* | | | | OPEN COLLECTOR OUTPUT
* | | | | |
.SUBCKT LM393 1 2 11 12 24

***** Input Stage *****
Q_Q1 4 1 6 QPNP1
Q_Q2 7 2 9 QPNP2
I_I1 111 10 DC 0.6m
R_RC1 4 12 95.49
R_RC2 7 12 95.49
R_RE1 10 6 45.49
R_RE2 10 9 45.49

***** Gain Stage & Frequency Response Stage *****
E_Eref 14 0 poly(2) (12,0) (11,0) 0 0.09091 0.09091
R_Rgnd 11 0 100k
I_Ignd 0 11 0.24m
Vsup 111 11 0
G_Ignd 0 11 poly(1) (11,0) 0 0.00678m
G_G1 14 15 7 4 0.01047
R_Rc 14 15 26.3Meg
C_Cc 14 15 0.00667n

***** Output Stage *****
E_E1 22 14 15 14 1
V_F1 23 24 0
F_F1 11 0 V_F1 1
R_Rout 22 23 13

***** Output Voltage Limiting *****
D_D1 15 18 D10D1
D_D2 19 15 D10D1
V_Voh 111 18 0.62
V_Vol 19 12 0.62

***** Models *****
.model QPNP1 PNP(Is=1E-15 Bf=8293.8)
.model QPNP2 PNP(Is=1E-15 Bf=9663.8)
.MODEL D10D1 D IS=1E-15 RS=1.000E-3 VJ=.75 BV=100E6
.ENDS

 

This is the LTSpice TI Application Circuit

 

hi rod.
As the Input signal on the Non Inverting input exceeds the Vref voltage on the Inverting input, then Vout will go High, this correct.
E

 

Thanks for reply. Your output is the same as my output which disagrees with the TI Dataheet for the LM393.

Below is a graph from the datasheet. The voltage comparator of this device drives an open collector output so the VOUT should be driven low when V+ exceeds V-.

 

hi rod,
That clip from the TI d/s does look incorrect, do you have the complete TI d/s you could post?
E

 

Below is a graph from the datasheet.

The graph is for a typical application, but does not specify whether "Voltage(V)" is derived from 'V+ - V-' or 'V- - V+'. Clearly it is the latter, because the output of the comparator only gets driven low when V+ is less than V-.

 

So I went and found a real LM393 and put it on a matrix board and it worked according to the spice model. When V+ is less than V- the voltage comparator is low and the open collector output is driven low. Not sure why the TI datasheet has inverted the output but it is wrong or mlisleading. Thanks for all replies. I can move on and design my circuit now !!!

 

Attached is the TI datasheet that I was looking at. Section 9.2.1 and 9.2.2. It clearly states V- is the reference voltage and V+ is the input voltage but they must have swapped V+ and V- to create the graph.

 

hi rod,
Checking the TI d/s it is not well explained, anyway we understand our simulations are correct.
E