For some reason i can't get my head wrapped around how a jfet is "self biased" by the value of the resistor on the source. We are going over them at school and i can't for the life of me understand what the feedback signal is on a jfet amp circuit. -- in my mind right now, i'm seeing the ac signal flowing through the gate through the source, and the resistor determining how much signal is reintroduced into the gate through the common ground.
-and if a jfet is fully on at 0V difference between the gate and source, why does does it need to be biased at all? Wouldn't you get a positive to negative amplified output signal with essentially no load on the source resistor?
-sorry i'm not explaining it better...i'm hoping you guys get what i'm saying.....

thanks,
Mike

 

Imagine a JFET with gate and source both grounded, and Vd=10V. You measure the drain current to be 10mA. I'm sure you understand that Id is a function of Vgs, and that as Vgs becomes more negative, the drain current decreases. OK, now put a 100Ω resistor in series with the source. Will the current still be 10mA? If it is, then Vs will be 10mA*100Ω=1V, so Vgs will be -1V. But if Vgs=-1V, how can the current still be 10mA? It can't be, of course. The current will decrease to some lower stable level. This is the negative feedback.
Regarding your second question: With no source resistor, Vgs will be zero. Positive excursions of the gate voltage will forward-bias the gate junction, which is generally not desirable. Also, you may want to run the transistor at a lower current than Idss, for power dissipation considerations. The bias current will be more stable as a function of temperature when a source resistor is present. The negative feedback introduced by an unbypassed source resistor also reduces nonlinearity in a common-source amplifier.

 

Look at the datasheet of the 2N5486 JFET. It has a fairly wide range of current when it has zero-bias voltage. Also its current is fairly high for an amplifier.
Some have a current of 8mA and others have a current of 20mA.
The input voltage must be less than about 0.5V to prevent the gate-source from rectifying the signal.

Add a source resistor then it is negative feedback which reduces the effects caused by the wide range of current. A low current JFET will cause a low current in the source resistor which reduces the gate-source voltage so the JFET has a reasonably high current. A high current JFET cause a high current in the source resistor which causes a high gate-source voltage so the JFET has a reasonably low current.
The gate-source signal voltage can be fairly high before rectification occurs.

The source resitor reduces the AC gain unless it is bypassed with a capacitor.

 

Thanks for the help....it's starting to clear up alot more for me now....maybe i'll pass this chapter yet....