Issues with Monostable Multivibrator using IC4007

Thread Starter

csstudent

Joined Oct 22, 2019
15
Hello, I'm having a final project for an eletronics course.
I have to implement a monostable multivibrator using an 4007 integrated circuit, using MOSFETs. I've started running into difficulties when assembling the circuit in a breadboard after running the simulations on Spice. I tried checking if results in an oscilloscope were matching the simulated ones, but they weren't.
I can't figure out if it's the pin allocation that's simply wrong or I just can't assemble stuff on a breadboard - or both. I've come here since surely there's people that aren't as dim-witted as I am.

The integrated circuit
The integrated circuit I'm using (was given) is an IC4007. For reference, here's the DIP:
1576418595797.png
Along with the prebuilt connections:
1576419633740.png

The circuit to implement
This is the monostable multivibrator using NOR/NOT gates I'm trying to do:
1576418785508.png
To make the logic gates, I've used the following MOSFET with pin-allocations:

1576419439989.png
Sorry for the crude drawing.
The functions used were:

The breadboard assembly
breadboard-600x315.jpg

The result of all of this, in the oscilloscope, is a never-stopping weird shape wave that does not match the simulation. I'm starting to believe that it's an issue with the capacitor and how it's mounted on the circuit.
 

ci139

Joined Jul 11, 2016
1,088
?? a monostable must have a favorable state (idle/default) which you intercept by trigger signal and which restores after some period is passed
you'r input (shoud) could be passed through differentiator so it wouldn't hold the pulse high (depends on configuration) or wouldn't cause undesired events when the trigger pulse is dropped after the monostable's output has returned to default

some reference : https://wiki.analog.com/university/courses/electronics/electronics-lab-28

. . . so , your positive input pulse forces the cap conducting and thus the output also HIGH until the cap is charged to threshold
then the OUTP goes LOW . . . and the cap is balanced to 0V across it . . . the spike input is created as . . . PPP in your case (these things can form delay lines when alternatingly sequenced . . .) . . // -- using the PPP only takes a negative pulse to trigger ~ using PPN→PPP pair allows positive pulse triggering . . . but your setup likely won't necessarily require differentiated trigger (however if you don't use such then ONLY AFTER you release the trigger to low the cap starts discharging . . . so it takes some time to get even output pulse lengths for every trigger event . . . blah , blah , blah , blaaah )

TTL-differentiators.png ← pulse propagation delay line formed of these →

K155jtH1 - X-Test - TH-4sm47p.png
 
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Thread Starter

csstudent

Joined Oct 22, 2019
15
?? a monostable must have a favorable state (idle/default) which you intercept by trigger signal and which restores after some period is passed
you'r input (shoud) could be passed through differentiator so it wouldn't hold the pulse high (depends on configuration) or wouldn't cause undesired events when the trigger pulse is dropped after the monostable's output has returned to default

some reference : https://wiki.analog.com/university/courses/electronics/electronics-lab-28

. . . so , your positive input pulse forces the cap conducting and thus the output also HIGH until the cap is charged to threshold
then the OUTP goes LOW . . . and the cap is balanced to 0V across it . . . the spike input is created as . . . PPP in your case (these things can form delay lines when alternatingly sequenced . . .) . . // -- using the PPP only takes a negative pulse to trigger ~ using PPN→PPP pair allows positive pulse triggering . . . but your setup likely won't necessarily require differentiated trigger (however if you don't use such then ONLY AFTER you release the trigger to low the cap starts discharging . . . so it takes some time to get even output pulse lengths for every trigger event . . . blah , blah , blah , blaaah )

View attachment 194599
I'm sorry, I can't understand what you said... Can you clarify for me? As for the setup, I'm using the one given to me as an assignmen...
 

ci139

Joined Jul 11, 2016
1,088
sorry my engrish --
i hope someone explains in detail but 1 thing i missed was the pullup resistor should be about 8k2 ohms and greater . . . at that value the CMOS gate can pull it down considering it's R.DS.ON has a higher resistance value as you go down from nominal 15V supply voltage . . . at 5V it's (the R.DS.ON e.g. the MOSFET's ON channel resistance is) about . . . 300Ω - i suppose

see the lab 28 - they explain a lot about the 4007 there
 

Thread Starter

csstudent

Joined Oct 22, 2019
15
sorry my engrish --
i hope someone explains in detail but 1 thing i missed was the pullup resistor should be about 8k2 ohms and greater . . . at that value the CMOS gate can pull it down considering it's R.DS.ON has a higher resistance value as you go down from nominal 15V supply voltage . . . at 5V it's (the R.DS.ON e.g. the MOSFET's ON channel resistance is) about . . . 300Ω - i suppose

see the lab 28 - they explain a lot about the 4007 there
Mind linking it? Sorry, I tried finding it on the "Education" tab
 

Thread Starter

csstudent

Joined Oct 22, 2019
15
consistency;

I normally don't use the 4007. I use mosfets and try to use a small number.
After thinking more, your circuit should work.
Right, but your seems so much more simpler. I'm curious how'd you reach it - and if it works (sims in Spice seem so)?
 

ci139

Joined Jul 11, 2016
1,088
v. with output differentiator : Fig.1 -- single n-ch-MOS-FET /// Fig.2 -- double - double-BJT differentiator

Digital - Logic - Test - S-9970.png , Digital - Logic - Test - S-9971.png
 
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ci139

Joined Jul 11, 2016
1,088
Pins 4, 7 and 9 aren't grounded in the breadboard pic.
vote for detecting something (not minding that incorrect - a pale pink isolation makes a good camouflage)
. . .
there are options
• mos-fet-s are sensitive to ESD and ~AC soldering iron (all leads should be tied together with fine wire removed after installation)
• the CD4000 and '4007 can have both shoulders conducting when input is near threshold ← may destroy the device
• the actual values of R --and/or-- C are different of that what they are been assumed to be (e.g. R = 1kΩ or C = 15pF)
• anything (that has) bad (electrical) connection (/continuity)
• . . .
 

ci139

Joined Jul 11, 2016
1,088
test all your transistor in separate (← if the option is avail)
/// "slow and steady one goes far" = draw your pin board connection diagram to paper and verify in multiple order that the connections match and are correct
keeping in mind there are input protection networks that set some limits to this (individual testing)
1-st connect 2 11 to 14 & 4 9 to 7 - then ::
(while testing set the other unused inputs either to Vdd or the Vcc)
• set the pull U/D resistors (about 10k) to 8/13 5/1 drive 6 and 3 ← you have 4 OUTPUT-s here
• set pullup resistor to 12 drive 10 ← you have 1 output here (pullup in parallel with the p-MOS)
• set pulldn resistor to 12 drive 10 ← you have 1 output here (pulldn in parallel with the n-MOS)
• connect 13-8-3 and 1-5-10 , set input to 6 , study chained inverting stages ← 3 outputs 3 , 10 ,12 (no pulling resistors)
• ↑ vary I/O /// connect 6 to 12 --and-- 8 to 13 (leaves the 3 as input to the chain)
• etc. -- while needed to verify the transistors are healthy

CMOS - Params.gif
 
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dl324

Joined Mar 30, 2015
9,582
How so? With a 4007 chip?
I breadboarded the circuit using a CD4007. With a 10k pull down resistor on the trigger input and no trigger, the circuit behaved as expected (LOW output).

I triggered using a signal generator as you did and for each rising edge of the trigger, the one shot generated a pulse.

I used a 100nF ceramic cap because it was handy. The pulse width seemed a little long, but I don't know the tolerance of the cap.
 

Thread Starter

csstudent

Joined Oct 22, 2019
15
I breadboarded the circuit using a CD4007. With a 10k pull down resistor on the trigger input and no trigger, the circuit behaved as expected (LOW output).

I triggered using a signal generator as you did and for each rising edge of the trigger, the one shot generated a pulse.

I used a 100nF ceramic cap because it was handy. The pulse width seemed a little long, but I don't know the tolerance of the cap.
But did you assemble it like the pic or with minor changes?
I used a 8.2k resistor - only one - with a 150nF capacitor using that exact layout of the breadboard and pins and was met with a fine pulse wave but CH2 on the output node gave me weird waves instead of a pulse. Chip was tested, btw
 
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