can you explain it

Here's a snippet from P1 of the IR2110 datasheet:

Note that Vs is not grounded, but connects to the source pin of the high-side FET.
Let's suppose Vdrain=500V, Vcc=12V and Vs is initially at 0V. By virtue of the diode, VB will initially be ~11.4V. This enables Ho to go to 11.4V when Hin goes to the logic high level, so the high-side FET switches on. This means Vs gets pulled up to 500V and, because of the bootstrap capacitor between Vb and Vs, Vb gets boosted up to 511.4V.
If Vs were grounded, this boosting action could not occur so the high-side FET source would never rise above 11.4V - Vgs(thr).

 

Here's a snippet from P1 of the IR2110 datasheet:
View attachment 170732
Note that Vs is not grounded, but connects to the source pin of the high-side FET.
Let's suppose Vdrain=500V, Vcc=12V and Vs is initially at 0V. By virtue of the diode, VB will initially be ~11.4V. This enables Ho to go to 11.4V when Hin goes to the logic high level, so the high-side FET switches on. This means Vs gets pulled up to 500V and, because of the bootstrap capacitor between Vb and Vs, Vb gets boosted up to 511.4V.
If Vs were grounded, this boosting action could not occur so the high-side FET source would never rise above 11.4V - Vgs(thr).

Hello Alec,

Thanks for explanation. I am wondering when Vs and Vb reaches 500 V( which is FETs -> Voltage at FET drain terminal), does that make output from HO switch to 500 V from 11.2 V ?

I tought IR2110 is a gate driver for power MOSFETS and IGBT and output from HO and LO pins should be limited to 12V

 

does that make output from HO switch to 500 V from 11.2 V ?

HO goes up to ~511.4V ideally.

I tought IR2110 is a gate driver for power MOSFETS and IGBT and output from HO and LO pins should be limited to 12V

You thought wrong. HO is a floating output. Read the datasheet.

 

I tought IR2110 is a gate driver for power MOSFETS and IGBT and output from HO and LO pins should be limited to 12V

The N-MOSFET Vgs (gate voltage relative to the source voltage) is limited to 12V (or so) but that voltage to ground has to rise with the load (source) voltage, which can be up to 500V, in order for Vgs to stay at the required ON voltage.

Make sense?

 

The N-MOSFET Vgs (gate voltage relative to the source voltage) is limited to 12V (or so) but that voltage to ground has to rise with the load (source) voltage, which can be up to 500V, in order for Vgs to stay at the required ON voltage.

Make sense?

Thanks crutschow. Some how in my earlier simulation, when I connected capacitor across Vs and Vb terminal of IR 2110 and other end of Vs is connected to drain of FET, I am seeing output from HO is around ~500 V. even tough it does not make any sense, I disconnected Vs from drain of FET and connected Vs directly to ground. In short, Vs should be at same level as drain of FET, that would be helpful in times of fast switching,