Inter-stage matching problem

Discussion in 'Wireless & RF Design' started by Spottymaldoon, Feb 3, 2016.

  1. Spottymaldoon

    Thread Starter Member

    Dec 4, 2015
    Matching two RF circuits isn't my strong point yet I need to do this as part of a larger project.

    I am trying to match an amplifier stage working over the range 80-120MHz, using a 2N3866 medium power RF transistor to a power stage that uses an MRF138 FET.

    I am using a forward biased diode to give fine control of Vbe and so Ic and there is also an adjustable bias on the FET gate.

    So far I am delivering a nice 100mV 100MHz sinusoidal input to the base of the transistor and getting an amplitude gain of around 8 at the collector which is fairly OK, though less than I'd hoped.

    However when I try to deliver this through an LC network to the gate of the FET I get a rotten-looking second harmonic signal of reduced amplitude.

    I reckon the output impedance of the transistor stage consists of the Vce/Ic in parallel with L5 (100nH) which is 140 ohms in parallel with 62 ohms at 100MHz. - or 43 ohms.

    And I reckon the input impedance of the FET stage is 27 ohms near enough.

    Obviously I am doing something dumb with my matching (please see the schematic) - could anybody please assist?
  2. Spottymaldoon

    Thread Starter Member

    Dec 4, 2015
    I seem to have managed to fix this - I replaced the 27 ohm resistor with 10K and it came to life with a little tweaking of the components and elimination of the type of inductor I was using - I shall start a thread to explore this further as I used a mini air core SM 100nH and it simply doesn't perform
  3. KL7AJ

    AAC Fanatic!

    Nov 4, 2008
    Excellent! Not much I could add. :)
  4. Spottymaldoon

    Thread Starter Member

    Dec 4, 2015
    In fact this project has taught me two valuable RF lessons. I had to change the circuit yet again.

    Firstly, take the time to calculate the output/input reactances of the two circuits being linked - it looks intimating when you have to work with "j" but it is simple algebra and then you can ensure your two resistances are equal and your two reactances are equal and opposite at the desired center frequency (fancy term: they need to be 'complex conjugates').

    Secondly, make totally certain you decouple the second stage from the first using double capacitors (high and lower values such as 10uF and .001uF in parallel) AND (because that's not enough) a good choke on the power line between them. Otherwise you'll get unwanted feedback and harmonic distortion at the very least.

    RF has always intimidated me as it's not my field (continues to do so) but this project has forced me to pay attention and I am not done yet.

    Your comments are welcome.
  5. Willen


    Nov 13, 2015
    Hi Spotty,
    Is that you design? How you calculated the matching network? I want to learn in very simple way too.
  6. Spottymaldoon

    Thread Starter Member

    Dec 4, 2015
    I think there are a lot of people here much better qualified to answer you than I and it might help if you posted your circuit here. What I did when matching an output to an input was simply to find the net impedance of each by treating each component as if it were a resistor and using +jωL for inductance and -j/ωC for capacitance and then simplifying each side to the form R±jX(ω) and so adjusting the values to make the net Rs the same and, for a specified frequency, the net reactances equal and opposite in sign. I hope I got this right!
    Last edited: Apr 10, 2016
  7. MrChips


    Oct 2, 2009
    Spotty, you are the right track.

    For the benefit of readers who are not familiar with the mathematical operator j, what spotty is doing is writing down the impedance Z of inductors and capacitors by applying the mathematical operator j which indicates that the impedance is 90° out of phase when compared to a pure resistance R.

    The impedance of an inductor = ZL = +jωL
    The impedance of a capacitor = Zc = 1/jωC = -j/ωC

    Note that the impedance of the inductor is 180° out of phase with that of the capacitor.

    For more reading on this subject, see the AAC lessons: