INTCON - mapping the PIC18F45K50.h with the PIC18C reference manual and getting a few oddities

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Hoylegj

Joined Mar 10, 2016
26
Working with a PIC18F45K50, I can not find a reference manual named the same, only a PIC18C manual.

I've Tried to map the PIC18F45K50.h with the PIC18C reference manual and getting a few oddities

The bit names do not match, but are they the same, i.e. bit wise functionally the same if you map to the new bit name?

Many Thanks Geoff.

C:
/* =====45K50.h  ===  PIC18C Doc
INTCON
1)  IOCIF:1;  // bit 0 RBIF:
2)  IOCIE:1;  // bit 3 RBIE:


INTCON2
3)  IOCIP:1;  // bit 0 RBIP:
4)  NOT_RBPU:1; // bit 7 RBPU:
*/


extern volatile near unsigned char  INTCON;
extern volatile near union {
  struct {
  unsigned IOCIF:1;  // bit 0 RBIF: RB Port Change Interrupt Flag bit
  //  1 = At least one of the RB7:RB4 pins changed state (must be cleared in software)
  //  0 = None of the RB7:RB4 pins have changed state
  unsigned INT0IF:1;  // bit 1 INT0IF: INT0 External Interrupt Flag bit
  //  1 = The INT0 external interrupt occurred (must be cleared in software)
  //  0 = The INT0 external interrupt did not occur
  unsigned TMR0IF:1;  // bit 2  TMR0 Overflow Interrupt Flag bit
  //  1 = TMR0 register has overflowed (must be cleared in software)
  //  0 = TMR0 register did not overflow
  unsigned IOCIE:1;  // bit 3 RBIE: RB Port Change Interrupt Enable bit
  //  1 = Enables the RB port change interrupt
  //  0 = Disables the RB port change interrupt
  unsigned INT0IE:1;  // bit 4 INT0IE: INT0 External Interrupt Enable bit
  //  1 = Enables the INT0 external interrupt
  //  0 = Disables the INT0 external interrupt
  unsigned TMR0IE:1;  // bit 5 TMR0IE: TMR0 Overflow Interrupt Enable bit
  //  1 = Enables the TMR0 overflow interrupt
  //  0 = Disables the TMR0 overflow interrupt
  unsigned PEIE_GIEL:1;// bit 6 PEIE/GEIL: Peripheral Interrupt Enable bit
  //  When IPEN = 0:
  //  1 = Enables all un-masked peripheral interrupts
  //  0 = Disables all peripheral interrupts
  unsigned GIE_GIEH:1; // bit 7 GIE/GIEH: Global Interrupt Enable bit
  //  When IPEN = 0:
  //  1 = Enables all un-masked interrupts
  //  0 = Disables all interrupts
  //  When IPEN = 1:
  //  1 = Enables all interrupts
  //  0 = Disables all interrupts
  };
  struct {
  unsigned :1;
  unsigned INT0F:1;
  unsigned T0IF:1;
  unsigned :1;
  unsigned INT0E:1;
  unsigned T0IE:1;
  unsigned PEIE:1;
  unsigned GIE:1;
  };
  struct {
  unsigned :6;
  unsigned GIEL:1;
  unsigned GIEH:1;
  };
} INTCONbits;


extern volatile near unsigned char  INTCON2;
extern volatile near union {
  struct {
  unsigned IOCIP:1;  // bit 0 RBIP: RB Port Change Interrupt Priority bit
  //  1 = RB Port Change Interrupt is a high priority event
  //  0 = RB Port Change Interrupt is a low priority event
  unsigned :1;
  unsigned TMR0IP:1;  // bit 2 TMR0IP: TMR0 Overflow Interrupt Priority bit
  //  1 = TMR0 Overflow Interrupt is a high priority event
  //  0 = TMR0 Overflow Interrupt is a low priority event
  unsigned :1;
  unsigned INTEDG2:1;  // bit 4 INTEDG2: External Interrupt2 Edge Select bit
  //  1 = Interrupt on rising edge
  //  0 = Interrupt on falling edge
  unsigned INTEDG1:1;  // bit 5 INTEDG1: External Interrupt1 Edge Select bit
  //  1 = Interrupt on rising edge
  //  0 = Interrupt on falling edge
  unsigned INTEDG0:1;  // bit 6 INTEDG0:External Interrupt0 Edge Select bit
  //  1 = Interrupt on rising edge
  //  0 = Interrupt on falling edge
  unsigned NOT_RBPU:1; // bit 7 RBPU: PORTB Pull-up Enable bit
  //  1 = All PORTB pull-ups are disabled
  //  0 = PORTB pull-ups are enabled by individual port latch values
  };
  struct {
  unsigned :2;
  unsigned T0IP:1;
  unsigned :4;
  unsigned RBPU:1;
  };
} INTCON2bits;


extern volatile near unsigned char  INTCON3;
extern volatile near union {
  struct {
  unsigned INT1IF:1;  // bit 0 INT1IF: INT1 External Interrupt Flag bit
  //  1 = The INT1 external interrupt occurred (must be cleared in software)
  //  0 = The INT1 external interrupt did not occur
  unsigned INT2IF:1;  // bit 1 INT2IF: INT2 External Interrupt Flag bit
  //  1 = The INT2 external interrupt occurred (must be cleared in software)
  //  0 = The INT2 external interrupt did not occur
  unsigned :1;
  unsigned INT1IE:1;  // bit 3 INT1IE: INT1 External Interrupt Enable bit
  //  1 = Enables  the INT1 external interrupt
  //  0 = Disables the INT1 external interrupt
  unsigned INT2IE:1;  // bit 4 INT2IE: INT2 External Interrupt Enable bit
  //  1 = Enables  the INT1 external interrupt
  //  0 = Disables the INT1 external interrupt
  unsigned :1;
  unsigned INT1IP:1;  // bit 6 INT1IP: INT1 External Interrupt Priority bit
  //  1 = INT1 External Interrupt is a high priority event
  //  0 = INT1 External Interrupt is a low priority event
  unsigned INT2IP:1;  // bit 7 INT2IP: INT2 External Interrupt Priority bit
  //  1 = INT2 External Interrupt is a high priority event
  //  0 = INT2 External Interrupt is a low priority event
  };
  struct {
  unsigned INT1F:1;
  unsigned INT2F:1;
  unsigned :1;
  unsigned INT1E:1;
  unsigned INT2E:1;
  unsigned :1;
  unsigned INT1P:1;
  unsigned INT2P:1;
  };
} INTCON3bits;
Moderators note: used code tags for C
 
Last edited by a moderator:

JohnInTX

Joined Jun 26, 2012
3,913
The 18C reference manual is very dated and should be used only for general information. The datasheet for the exact chip you are using should be the the reference you use. Register and bit names can change as features get updated, added etc. The names in the datasheet will match those in the .h file for your chip. Also, later compilers like XC8 can define the PIC registers differently than earlier compilers did so the constructs shown in the old reference manual may be problematic in current stuff.

Caveat: on very rare occasions, the .h file will have a discrepancy in the naming vs. the datasheet. Usually, problems will be your own but it is sometimes worthwhile to review the .h to see if naming conventions have changed. Sometimes the .h files get changed before the datasheet catches up. It does not happen very often.

Good luck.
 
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