Hello , As you can see in the simulation when we have a short load we have 0 impedance in the end because its 0 ohms.
On the other hand as you can see below in the simulation when we have inductive load then we have negative bump in the tdr.
A shorting via can ve viewed as inductor because its a straight line .
Why in our EM simulation I dont have negative bump as in the LTspice simulation?
Thanks.

 

UPDATE:
As you can see I simplified the model into one microstrip line with short at the end .
From the power flow simulation the signal reaches the short at 0.44ns.
few questions:
1.As you can see in the CST TDR when the signal comes back from the short at around 1ns It creates small ripples at 1ns.why is it happening?
2.a short at the can have inductive properties and series resistive properties.
when Its more inductive then resistive then the behavior is gamma positive .
How can I asses based on the geometry of the short the effective inductance and series resistance of the load?
3.same thing with open load , It has its very large resistive properties but a small capacitative properties ,when the capacitative load gets too large then the behavior of the reflected signal reverses.
How can I asses based on the geometry of the open load the effective inductance and series resistance of the load?
4.I have made a LTspice simulation as shown in the photos below and in the attached files.
What is the intuition behind the shape of this inductive peak? why the echo from this kind of load is such a peak?

Thanks.