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Implementation of a barrel processor

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udaymach

Joined Jul 5, 2010
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Can anyone help me out in implementation of a barrel processor on a FPGA. The processor has to execute only one instruction from each thread at a time upto 'N' available threads. Can anyone help me out with an architecture for a barrel processor. I need to implement in VHDL.

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Thanks,
UDAY
 
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