yes, the outputs are permanently enabled until a different signal is sent

currently i am using another shift register to assign the shift register with a state of locked or unlocked. but that only assigns the shift register with a state that doesn't actually restrict it from getting a signal

 

Let me help you rephrase the problem as follow:

I have ten 74HCT595 8-bit serial-in/parallel-out shift registers. (I may want to increase this to twenty in future.)
How can I control the serial data so that only one shift register receives the data and not the others?

 

Let me help you rephrase the problem as follow:

I have ten 74HCT595 8-bit serial-in/parallel-out shift registers. (I may want to increase this to twenty in future.)
How can I control the serial data so that only one shift register receives the data and not the others?

That's exactly what i want

 

yes, the outputs are permanently enabled until a different signal is sent

currently i am using another shift register to assign the shift register with a state of locked or unlocked. but that only assigns the shift register with a state that doesn't actually restrict it from getting a signal

We do not use the words locked or unlocked in a situation as this one.
We don't know what locked and unlocked means.

Serial data is shifted into the shift register (SR) by means of a SHIFT CLOCK. Either the SR gets the clock or it doesn't get the clock. Some other SR might do it differently. In either case, the digital solution is straight forward.

 

That's exactly what i want

See how simple that was, 22 posts later!

 

Did you know that you can daisy chain your SR so that there is no need to select any particular SR?
This solves the problem of expansion and you can add any number of SRs to the chain (up to a limit).

 

We do not use the words locked or unlocked in a situation as this one.
We don't know what locked and unlocked means.

Serial data is shifted into the shift register (SR) by means of a SHIFT CLOCK. Either the SR gets the clock or it doesn't get the clock. Some other SR might do it differently. In either case, the digital solution is straight forward.

what about the latch clock if it gets put from low to high it will clear the existing latched data and replace it with data that has just been sent to the shift register. if i sent no data to that shift register then it will clear its data. If I'm trying to control one shift register without interfering with the others how do i latch the one without clearing all the others if there all connected to the same latch clock.

 

Did you know that you can daisy chain your SR so that there is no need to select any particular SR?
This solves the problem of expansion and you can add any number of SRs to the chain (up to a limit).

I just looked up daisy chained Shift registers and i wish i had know this sooner this fixes all of my problems thank you so much.

 

what about the latch clock if it gets put from low to high it will clear the existing latched data and replace it with data that has just been sent to the shift register. if i sent no data to that shift register then it will clear its data. If I'm trying to control one shift register without interfering with the others how do i latch the one without clearing all the others if there all connected to the same latch clock.

The designers of the 74HCT595 SR had all of these situations in mind when they designed the chip. These situations are all too common and the solutions are straight forward, once you have the knowledge. Trust me.

Notice how the path this thread has taken and the final solution has nothing to do with the initial thread title. Live and learn.

 

Here is one solution to your problem that I may offer.

Cascade all the shift registers (i.e. daisy chained).
Serial data is sent on one output pin.
Clock the SHIFT CLOCK n x 8 times, where n = number of SRs.
Send one LATCH CLOCK.

/RESET pin is tied to LOGIC HIGH.
/OUTPUT ENABLE is tied to LOGIC LOW.

 

what about the latch clock if it gets put from low to high it will clear the existing latched data and replace it with data that has just been sent to the shift register. if i sent no data to that shift register then it will clear its data. If I'm trying to control one shift register without interfering with the others how do i latch the one without clearing all the others if there all connected to the same latch clock.

It won’t necessarily clear the data. If the underlying data in the shift register hasn’t changed, it will just be reloaded. The latch is used as a snapshot of the data in the shift register. This is used so the data remains constant while a new set of data is shifted in. Otherwise, the first bit would take on the value of all the other bits as they are shifted in.

 

That's exactly what i want

Really? Because from this:

I need someway to block the ones i am not using while sending signals to the ones that i want to use so they all can have different outputs

and this:

Yes, i want to be able to freely control which shift registers are locked and which ones are free to change

I thought that sometimes you wanted to have more than one shifter enabled at the same time. Making the shifters exclusive (only one active at any given time) is a much easier system.

Note that most of the mux and decode chips have 8 or 16 inputs/outputs, not 10 or 20. Having 20 devices means a decode tree that can support 32. There is a 4-line to 10-line decoder, but it is a pain to use because it does not have an enable input.

It's not a big deal to design a 20-device circuit, but it's more simple if the max. is 16. Just sayin'.

ak