Does that mean that you were able to share some intermediate signals?37 AND = 10 pkg
11 OR = 3 pkg
6 INV = 1 pkg
54 gates, 14 packages total
If I didn't make a mistake, that would make it a tie.
In any event, it sounds like the gate/package counts are comparable. I don't know which solution would be the most "elegant". It would probably depend on the viewpoint being taken and what is important.
Yours has the nice feature that it works directly off the definition of the problem. Oh, does it take into account that wrap around is not allowed so that 0 and 7 are not considered adjacent? I assume so since your test bed should check all 64 possible input combinations, so if it didn't I imagine you would have caught it.
Mine has the advantage of being easily scaled. You could easily make a PCB that handles some small number of inputs, say two bits or three bits for each gear value, and then stack an arbitrary number of them together. It would require a slight modification to support the next higher bit and to glue the adjacent gears that cross the PCB boundary together.
That might make an interesting assignment (perhaps extra credit).

