I2C signal quality and SDA/SCL microcontroller protection

Thread Starter

josmA

Joined Jun 12, 2019
39
Do these signals go between two PCB's? How far physically are you sending this data?
Not far, as they are both connected through a header pin connector. While testing with the dev. board I am using dupont wires, and I can see that the quality of the signal gets worse, but it is just for testing. The PCB length is about 250mm, so the I2C bus is "long"
 

Thread Starter

josmA

Joined Jun 12, 2019
39
You need to disable / change the address of the chips with the same address's.
do that before any thing else

How many loads do you have on the bus ?
what are the chips you have
I have ~12 power monitors ICs and 7 I2C expanders ICs.
 

Thread Starter

josmA

Joined Jun 12, 2019
39
What could cause I2C to be damaged ?

a) ESD, if you have boards that can be dis connected

b) driving a chips pin , when the chip is not powered,
i.e. if the peripheral is not powered and your driving the SDA / SCL high,

c) over voltage ,
i.e. if the two grounds are not the same, typically if one of the boards is un plugged, ground should connect first

protection

a) Use an I2C buffers

b) Use clamp diodes ( adding a series resistor will kill the operation of the diode )

https://www.semtech.com/uploads/common/PB-SEMTECH-TVS-I2C-BUS.pdf

https://assets.nexperia.com/documen...ochure_ESD-Protection-Applications_022017.pdf


But

I2C, being low resistance ( due to the pull ups )
is incredibly robust

I'd suggest the problem lies with the way the sections are powered up ,

You say you have power chips,
are some of the sections by some chance powered down when others are powered up. whoch are joined by the I2C bus.


How about a block diagram, showing the power control / I2C bus
We don't need function names, so nothing sensitive,
a) Boards can be disconnected/Unplugged, but not likely to happen, usually I switch off the power supply before doing that. Another case is when I using the dev. board, which is always on (powered by the laptop) while I switch ON and OFF the Custom/Slave board. What is the risk reason of doing this?

b) This case shouldn't happen, all are connected to the 3.3v rail once I switch on the power supply. For the future, could you explain why is it risky?

c) I haven't respect it while I have been using the dev. board, so this could be a potential reason.

Protection:
a) Should I place the I2C buffer just after the MCU output pins?

b) Thanks for the links, very useful. I will remove the series resistors, I saw this solution somewhere. Could you explain why they kill the diode's operation?

I hope this helps:
1630918283587.png

Thank you very much for your reply, very interesting points.
 

Thread Starter

josmA

Joined Jun 12, 2019
39
Where's the positive +vcc? If above is true, your slaves run with bus voltage.
Dev. board is powered by a laptop, and the slave board is "self-powered". I am not connecting +Vcc from the slave board to the dev. board. But when I used the real board that we could call it master PCB instead of the dev. board, it is powered by the same source as the slave board, and the master board SDA pin was damaged equally.

Thank you
 

Deleted member 115935

Joined Dec 31, 1969
0
a) Boards can be disconnected/Unplugged, but not likely to happen, usually I switch off the power supply before doing that. Another case is when I using the dev. board, which is always on (powered by the laptop) while I switch ON and OFF the Custom/Slave board. What is the risk reason of doing this?

b) This case shouldn't happen, all are connected to the 3.3v rail once I switch on the power supply. For the future, could you explain why is it risky?

c) I haven't respect it while I have been using the dev. board, so this could be a potential reason.

Protection:
a) Should I place the I2C buffer just after the MCU output pins?

b) Thanks for the links, very useful. I will remove the series resistors, I saw this solution somewhere. Could you explain why they kill the diode's operation?

I hope this helps:
View attachment 247353

Thank you very much for your reply, very interesting points.


Well, easy ones first.
Diode protection. The chip has an inherent diode in it to the power rails on every IO pin, Its a fact of the way the chip is made. Its just they are not very good high current diodes in the chip, a few mA and they pop, Not good for any chip.

The aim of the external diodes is that the current follows the lowest resistance path, through the external diode
if you put a resistance in series with the external diodes, the current will prefer to flow through the chips diode !!

For every Io connection that goes off board,
there should be an ESD protection circuit in place,
one diode up to the Vcc, one down to ground.
There are low capacitance ESD chip diodes for this ,


Boards un plugged / plugged
one board powered one not powered,
"not common you say" bu tcan happen.

So if one boar dis un powered, and the other is powered, unless you can guarantee all signals between the boards are tri state / ground, one board can be driving a signal to the other.
As per above, a signal of say 3v3 , applied to an IO pin of a chip , which has no volts on it,
Look in the chip spec, you will see an abs max value for the input voltage above the Vcc,
as the chip is not powered , Vcc is zero, so you are now applying say 3v3 to the input pin, that is going to drive a current through those inherent input diodes on the chip.

QED, un powered chip cna have its IO damaged.

Used not to be a real problem , back 40 years ago, big silicon, inherent diodes were BIG , and could take current
now days , 10nm silicon, diodes can take 2 5ths of nothing.


what's next :

I2C buffer.
The idea of the buffer is many fold.
At the lowest level, its a sacrificial device, dead cheap, easy to debug and easy to replace . So if you do every have problems, its the buffer that goes, not the MCU. So they go at the source / at the i2C master end.

They also , if you get a buffer version, not an analog gate version, more robust than say a typical MCU IO pin.

They also have the ability to be disabled if there is say no power,
i.e. they have often have tow power supplies, one for each side,
one side , powered off and connects to the master, the other , gets a power feed off the slave bus,

you can also use them to voltage translate,

And if you have i2C on a board, with a master, and I2C connects off board,
you can , if you get the right sort of buffer , connect one on the IO connector as well as one on the master.
Then the off board i2C, if it fails does not kill the on board I2C , Again sacrificial.

Think I have covered everything you asked,
 

Thread Starter

josmA

Joined Jun 12, 2019
39
Well, easy ones first.
Diode protection. The chip has an inherent diode in it to the power rails on every IO pin, Its a fact of the way the chip is made. Its just they are not very good high current diodes in the chip, a few mA and they pop, Not good for any chip.

The aim of the external diodes is that the current follows the lowest resistance path, through the external diode
if you put a resistance in series with the external diodes, the current will prefer to flow through the chips diode !!

For every Io connection that goes off board,
there should be an ESD protection circuit in place,
one diode up to the Vcc, one down to ground.
There are low capacitance ESD chip diodes for this ,


Boards un plugged / plugged
one board powered one not powered,
"not common you say" bu tcan happen.

So if one boar dis un powered, and the other is powered, unless you can guarantee all signals between the boards are tri state / ground, one board can be driving a signal to the other.
As per above, a signal of say 3v3 , applied to an IO pin of a chip , which has no volts on it,
Look in the chip spec, you will see an abs max value for the input voltage above the Vcc,
as the chip is not powered , Vcc is zero, so you are now applying say 3v3 to the input pin, that is going to drive a current through those inherent input diodes on the chip.

QED, un powered chip cna have its IO damaged.

Used not to be a real problem , back 40 years ago, big silicon, inherent diodes were BIG , and could take current
now days , 10nm silicon, diodes can take 2 5ths of nothing.


what's next :

I2C buffer.
The idea of the buffer is many fold.
At the lowest level, its a sacrificial device, dead cheap, easy to debug and easy to replace . So if you do every have problems, its the buffer that goes, not the MCU. So they go at the source / at the i2C master end.

They also , if you get a buffer version, not an analog gate version, more robust than say a typical MCU IO pin.

They also have the ability to be disabled if there is say no power,
i.e. they have often have tow power supplies, one for each side,
one side , powered off and connects to the master, the other , gets a power feed off the slave bus,

you can also use them to voltage translate,

And if you have i2C on a board, with a master, and I2C connects off board,
you can , if you get the right sort of buffer , connect one on the IO connector as well as one on the master.
Then the off board i2C, if it fails does not kill the on board I2C , Again sacrificial.

Think I have covered everything you asked,
Thank you very much for taking the time to answer. I will follow your recommendations to fix the current PCB and definitaly for the next version.
 
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