i have build a JK flip flop using using only nand gate but it does not simulate, i need help please

ebp

Joined Feb 8, 2018
2,332
When the clock is high there is nothing other than gate delays between input events and output events. A JK flip flop must enforce separation in time of input and output events. Edge triggered flip flops do this by careful management of delays. Master-slave flip flops do this by using one level of the clock for acquiring the input state and the opposite level for propagating that state to the output (in consequence of this, master-slave flip flops exhibit "opposite state catching", sometimes semi-erroneously called "ones catching" behavior).

If you can find old datasheets for the74109 and 7473 flip flops you will see the equivalent circuit as gates. The equivalents aren't on more recent datasheets. I haven't looked at sheets for the CMOS versions such as HC109 or AC109, but CMOS devices are often implemented with transmission gates in key places internally.
 

crutschow

Joined Mar 14, 2008
24,397
You can't directly connect LEDs to the outputs.
They clamp the output voltage to their forward drop.

Why are both output nodes labeled with a (?)?

That circuit will not work properly for the JK logic of both inputs at a logic high.
 

Thread Starter

nyame

Joined Jul 4, 2016
14
You can't directly connect LEDs to the outputs.
They clamp the output voltage to their forward drop.

Why are both output nodes labeled with a (?)?

That circuit will not work properly for the JK logic of both inputs at a logic high.
it does not even simulate that is my first trouble !
 

Thread Starter

nyame

Joined Jul 4, 2016
14
hi,
What are the logic levels on U1 and U2, Hi or Lo and/or are they Toggling in sync with the Clock.?
E
once one level is low and the other high, we then use a close to give a pulse to change the output state! at each pulse one state is high and the other low !
 

Thread Starter

nyame

Joined Jul 4, 2016
14
You can't directly connect LEDs to the outputs.
They clamp the output voltage to their forward drop.

Why are both output nodes labeled with a (?)?

That circuit will not work properly for the JK logic of both inputs at a logic high.
You can't directly connect LEDs to the outputs.
They clamp the output voltage to their forward drop.

Why are both output nodes labeled with a (?)?

That circuit will not work properly for the JK logic of both inputs at a logic high.
those sign ?, show the circuit is not simulating, that is the logic indicate, is suppose to be at zero if the circuit is working correctly, even before adding the led, the circuit was not simulating !
 

WBahn

Joined Mar 31, 2012
25,277
You have a latch circuit. When you power it up, what is the state of that latch?

If you don't know, how can the simulator know?

You either need to provide inputs that force it into a known state after start up, or set initial conditions on the simulation to allow the simulator to know how it starts up.
 

Thread Starter

nyame

Joined Jul 4, 2016
14
You have a latch circuit. When you power it up, what is the state of that latch?

If you don't know, how can the simulator know?

You either need to provide inputs that force it into a known state after start up, or set initial conditions on the simulation to allow the simulator to know how it starts up.
it does not run in the simulator, just null, no simulating indications
 

WBahn

Joined Mar 31, 2012
25,277
it does not run in the simulator, just null, no simulating indications
Have you simplified the circuit down until you have something that DOES run?

Start with a single NAND gate with hard tied inputs, if necessary, and work your way up from there.
 

dl324

Joined Mar 30, 2015
10,072
This seems like a homework problem to me. If the OP doesn't clarify, this should be moved to Homework Help before someone gives the answer...
 

Ian Rogers

Joined Dec 12, 2012
708
As WBahn said.. Simulation is far too critical with startup conditions... U3 and U4 lock up at startup. Just put a 10k resistor in the track between the two... where your output of U3 connects to the input of U4... Then the simulation will not lock up!! In real life situations this won't happen and the resistor isn't needed!!
 
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