Huge Input Current Spike Buck-Boost Converter LTspice simulation (example design exported from LTPowerCAD)

Thread Starter

jim0000

Joined Oct 28, 2020
130
The simulation shows that there is a huge input current spike it LT's example design. I noticed the same thing in my design and wanted to check theirs to see if it was something I was doing. Why is this happening? In the plot I measured the current through Cinb1 in the red which went up to almost 440A. Then the current through Cinc1 is nearly 25A. The caps would not be able to handle this, is this something that can be ignored since LTspice will not always represent what happens in the real world? I notice if I reduce the input capacitance the spike becomes much less, but of course I do not want a lot of ripple at the input.

1667963487421.png
1667963605428.png
 

ronsimpson

Joined Oct 7, 2019
2,527
Several things are probably happening.
Vin1 goes from 0V to 12V in 0nS. This is hard on capacitors. You could add a small amount of resistance/impedance to Vin1. (series resistance)
You can change Vin1 to a different kind and have the voltage ramp up in 1uS or 1mS.
You can look at the data sheets on the caps used and add ESL and ESR to the capacitor models.
 

crutschow

Joined Mar 14, 2008
31,123
Adding some real world values for the capacitor impedances, as Ron suggested, would likely significantly reduce some of the high peak currents you are seeing.
 

Thread Starter

jim0000

Joined Oct 28, 2020
130
Several things are probably happening.
Vin1 goes from 0V to 12V in 0nS. This is hard on capacitors. You could add a small amount of resistance/impedance to Vin1. (series resistance)
You can change Vin1 to a different kind and have the voltage ramp up in 1uS or 1mS.
You can look at the data sheets on the caps used and add ESL and ESR to the capacitor models.
Oh okay thank you so much, I was thinking of adding a thermistor to really block a lot of any spikes to protect the input capacitors. Is that a good idea? I was thinking it would block better than a resistor and then consume less power after it's resistance lowers. So its a simulation problem that is due to my source stepping up too quickly? Also I was curious if increasing soft start time of the device (which is tuned by the capcitor in screenshot below) would help?
1668095962635.png
 

Thread Starter

jim0000

Joined Oct 28, 2020
130
Here's the solution. The filtering properties of the capacitors are the same.View attachment 280259
Nice! Thank you. I am confused by what the bottom circuit is doing. My circuit will be connected to either a solar panel, battery, or power supply. So I would only have 1 source going to the input capacitors. Is the bottom circuit more so representing a different ground for the circuit that is separate from the power supply? If so, is that the only way to model a separate ground in LTspice? If that is the case I am curious what effect the 2nd source is having on the circuit as opposed to just having a separate ground.
 

RPLaJeunesse

Joined Jul 29, 2018
222
A small inductor between the (step function) supply and the first capacitor will do wonders for reducing the surge spike. Additionally it will be less lossy than a thermistor or other primarily resistive device. You might also add to your simulation the resistance of the power (and power return!) connection wires even though that is in the milliohms.
 

kaindub

Joined Oct 28, 2019
112
I think if you put some internal resistance into the Vin1 youll get sensible currents. With no internal resistance the current just wants to flow.
The internal resistance can be from 0.1 to an ohm or two depending on the supply. And the solar panel is even higher.
 

Thread Starter

jim0000

Joined Oct 28, 2020
130
I think if you put some internal resistance into the Vin1 youll get sensible currents. With no internal resistance the current just wants to flow.
The internal resistance can be from 0.1 to an ohm or two depending on the supply. And the solar panel is even higher.
For internal resistance do you mean the resistance for the power supply or for the caps? I have the esr for the electrolytic caps, but unfortunately, I couldnt find esr for my ceramics.
 

ronsimpson

Joined Oct 7, 2019
2,527
For internal resistance do you mean the resistance for the power supply
Yes.
-----------------------------------------
There is a way to set the initial voltage on the caps. Right now the voltage goes from 0 to 12V in 0 time. There is a command to force the caps to start out at 12V.

.IC -- Set Initial Conditions
The .ic directive allows initial conditions for transient analysis to be specified. Node voltages and inductor currents may be specified. A DC solution is performed using the initial conditions as constraints. Note that although inductors are normally treated as short circuits in the DC solution in other SPICE programs, if an initial current is specified, they are treated as infinite-impedance current sources in LTspice.

Syntax: .ic [V(<n1>)=<voltage>] [I(<inductor>)=<current>]

Example: .ic V(in)=2 V(out)=5 V(vc)=1.8 I(L1)=300m
 
Last edited:
Top