How to suppress Gate voltage ringing when I drive a normally on HEMT

Thread Starter

onezhenji

Joined Oct 5, 2021
10
Hi, guys.
These days I was doing some HEMT chips testing, here is my test condition:
Set drain voltage to 48v const;
Sweep gate voltage from -6v to -1v, 251 steps totally(0.02v a step), sweep speed is 1000Hz.
Source was set to floating.(which was connected to power supply's sense low).
I caught the waveform of the gate voltage, and the gate voltage always ringing around the corner of Vth. Here are waveforms of the gate voltage(I ran loop for the gate voltage).
I have tried several methods to prevent this ringing, including connecting ferrite bead and resistor in the gate and slow the sweep speed, but it seemed that these methods didn’t work.A9A9C673-138E-4049-AF2D-027AE5774834.jpegE6D118DB-C323-4C5B-B8DF-99A4803C5C5A.jpeg14D8D640-5686-403D-B6EE-969F7AC54004.jpeg
 

Thread Starter

onezhenji

Joined Oct 5, 2021
10
How are you connecting the scope probe? Can you show pictures of physical test rig?
Hi Irving, thank you for your reply.
I have two wires welded on my probe card’s gate needle and the source needle(since I was doing wafer testing), these needles are closed to DUT(when there is no DUT, the gate voltage or power supply’s is smooth and without any ringing), then I connected my oscilloscope to the wires I mentioned.
In terms of the test rig, I use an ATE called ETS88 and it is in the Fab, I can’t shot it. I will attached the picture of probe card’s schematic and PCB tomorrow.
 

Irving

Joined Jan 30, 2016
2,322
It could be the probe generates the ringing, especially if you are using any length of wire to the probe ground. You need to connect the probe to gate and source as close as possible - typically I have pcb pads and use just the probe tip and a ground spring. If your probe didn't come with one, its easy to make one as shown here.

Ah - I just googled ETS88; that's some test set-up!

1633521418420.png
 

Thread Starter

onezhenji

Joined Oct 5, 2021
10
It could be the probe generates the ringing, especially if you are using any length of wire to the probe ground. You need to connect the probe to gate and source as close as possible - typically I have pcb pads and use just the probe tip and a ground spring. If your probe didn't come with one, its easy to make one as shown here.

Ah - I just googled ETS88; that's some test set-up!

View attachment 249669
When there is no oscilloscope probe and welded wires, there is still ringing in my circuit, because I found the transfer curve of my DUT is abnormal, here is what it looks like(sorry I am not at office now, so I can’t attach the real curve until tomorrow.)
C143CE17-771D-4E23-AA78-40F8463B7ED8.png
 

Irving

Joined Jan 30, 2016
2,322
This could be because gate drive is impacted by parasitic source inductance. The source side of the gate drive must be connected to the DUT as a kelvin connection to avoid the drain-source current through an external parasitic source inductance of the test jig impacting the gate drive.

1633525278909.png
 

Thread Starter

onezhenji

Joined Oct 5, 2021
10
This could be because gate drive is impacted by parasitic source inductance. The source side of the gate drive must be connected to the DUT as a kelvin connection to avoid the drain-source current through an external parasitic source inductance of the test jig impacting the gate drive.

View attachment 249679
Thank you Irving for your insightful suggestion, there are several relays in the source side, maybe they were the criminals. I will try jump wires to avoid these relays and see the results.
But if these relays are necessary for my circuit(indeed they are), and I have had flyback diodes paralleled, can I have other methods to prevent ringing?
Before i take over this job, my predecessors usually parallelled a capacitor between the Drain and the Source to avoid abnormal transfer curve, but they neither me, don't know the exact value or the range of capacitance would be useful, we just try it over and over until it works. That's annoying.
 

Irving

Joined Jan 30, 2016
2,322
Hmmm, thats a weird approach. Normally you want to minimise capacitances not increase them! I'd need to see your circuit to comment further.

I have to say your scope traces are unusual. Normally ringing occurs as a result of, or at, a step change in either gate or drain voltage/current, its the resonant energy transfer back and forth between parasitic (and bulk) inductances and capacitances. Yours are occurring mid-slope and are more like noisy spikes rather than ringing. How is your gate drive generated?
 

Thread Starter

onezhenji

Joined Oct 5, 2021
10
Hmmm, thats a weird approach. Normally you want to minimise capacitances not increase them! I'd need to see your circuit to comment further.

I have to say your scope traces are unusual. Normally ringing occurs as a result of, or at, a step change in either gate or drain voltage/current, its the resonant energy transfer back and forth between parasitic (and bulk) inductances and capacitances. Yours are occurring mid-slope and are more like noisy spikes rather than ringing. How is your gate drive generated?
My GATE driver generated by AWG, ramp sweep from -6v to -1v, 0.02v gap between every point.
 

Thread Starter

onezhenji

Joined Oct 5, 2021
10
Hmmm, thats a weird approach. Normally you want to minimise capacitances not increase them! I'd need to see your circuit to comment further.

I have to say your scope traces are unusual. Normally ringing occurs as a result of, or at, a step change in either gate or drain voltage/current, its the resonant energy transfer back and forth between parasitic (and bulk) inductances and capacitances. Yours are occurring mid-slope and are more like noisy spikes rather than ringing. How is your gate drive generated?
Hi Irving, here are my schematic and PCB board(probe card) pictures.
This probe card was designed to test 8 chips simultaneously, so there are 8 independent but identical circuits in one board.
In the schematic, APU12 is the power supply and measure tool, so SP500 is.
CBIT is a relay(ECBIT are relays on the PCB board).
When I test, I use APU12 on the GATE, SP500(no sense) on the Drain. SO I close K4 to make SP500's Force Low connect to the Source.
Hope my description helps clear my question. Thank you.PCB1.jpgPCB3.jpg
sch1.PNGsch2.PNGsch3.PNGsch4.PNGsch5.PNGsch6.PNGsch7.PNG
 

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ronsimpson

Joined Oct 7, 2019
1,680
Hi, onezhenji
I am using large GAN HEMT transistors from many sources in double pulse testers. (100 to 600V and 20 to 100A)
When testing Silicon MOSFETs I can have the Gate driver IC 10 cm away from the transistor.
When testing SiC MOSFETs I can have the Gate signal source only 5 cm away from the transistor.
When testing GAN transistors I have the signal source 1cm away. It is very easy to get 300 to 400mhz oscillation.
Post #6; any inductance in the source is a big problem. Gate inductances is a problem.
In my case I am doing testing for dynamic. I have the Gate at 6V or -1V and do not have the gate at the switching threshold. I switch from on to off very fast. (4nS) In your case where the gate slowly steps from off to on, the part will oscillate.

Thanks for the good pictures.
I can not see how the Transistor Under Test is connected.
D=48V power supply.
S= open or power supply.
G= -6 to -1V. (so I think your part is on at 0V and off with -6V) ???

I have ceramic capacitors from D-S very close to the transistors.
Maybe you need coax on the Gate wires. Add 50 ohm resistor G-S at the end of the coax. This will help reduce the inductance on the Gate.

What makes the Gate signal?
------------edited-------------
Now I can see you have D-S capacitors. I see G-S wires are 100 ohm impedance, twisted wires.

D= supply, S= supply, What is current limit? Is there a Resistor load?
 
Last edited:

Thread Starter

onezhenji

Joined Oct 5, 2021
10
can have the Gate driver IC
Hi Simpson.
From the bottom picture, you can see there are 8 groups of probe needles, and they are used to connect HEMT chips(or die, more precisely). Each group has 3 needles, for the Gate, the Source and the Drain.
I test 8 chips at a time, that's why there are 8 groups of probe needles. These groups are independent of each other and their circuits were designed to identically.
The signal, both the Gate and the Drain are far away from my DUT, they go through 2 connecting boards and about 1 meter long cables. (Totally a disaster compare to yours).
I have AWG to make the GATE signal. sorry about the twisted wires, they were reached out for the oscilloscope's probe, normally they shouldn't appear.
The current limit is 10mA between the Drain and the Source, so is G to S.
No resistor load between GS or DS, but there are 1000ohm and a ferrite bead for me to use in the Gate when I close the relay "K3", see the following picture(but it didn't work for reducing the noise, I tried):
GloadR.PNG

Yes, my part turns on at 0V and turns off at -6V.
Today, I tried to break the ramp signal to a ramp-flat-ramp signal, and here is the transfer curve, it looks abnormal again.
The Gate signal before is like -6, -5, -4, -3, -2, -1, now I changed it to -6, -5, -4, -3, -3, -3, -2, -2, -2, -1(in real, I have more than 2000 points) because I want to wait for the Gate voltage to calm down and then extract the current value.
curve.PNG
 

ronsimpson

Joined Oct 7, 2019
1,680
I have used test fixtures like yours with slow transistors.
I do not know what to do with fast transistors. I will ask another engineer who is working on testing chips.
I am using transistors not chips. I had to make a fixture with the Gate signal generator in the fixture.
I found it helps to add a bead to the Gate wire very close to the chip.
I think the twisted wires are a good idea.
 

Irving

Joined Jan 30, 2016
2,322
I think the twisted wires are a good idea.
Well they are better than loose wires, but it would be much better to get the scope probe direct on the gate pin. There's a lot of parasitic inductances in that test jig. A properly terminated coax would be better, but its impedance is low and may impact on the test. Ideally I'd look to put a high impedance, low-C buffer on the gate using a good, fast, instrumentation op-amp, and maybe a low impedance driver from the AWG.

Incidentally are you setting the AWG output to 50ohm or Hi-Z and are you using coax or twisted pair from AWG to jig? When I was characterising RF Power MOSFETs back in the 1980s (when a 100W device at 100MHz was the latest tech and cost several arms and legs) we had all sorts of problems keeping them stable while testing... basically everything must be matched/properly terminated and as short as possible!
 

ronsimpson

Joined Oct 7, 2019
1,680
100MHz was the latest tech
These parts are probably much much faster. I have parts that want to oscillate at 400mhz. Very large parts. The little parts are much faster yet.
He is doing DC measurements. So we should think about Gate to Source capacitance. Lets add a capacitor very close to the chip. That may slow down the part. OR it might make thing worse. lol
 

Irving

Joined Jan 30, 2016
2,322
These parts are probably much much faster. I have parts that want to oscillate at 400mhz.
Oh agreed, within a couple of years we were using parts at the GHz level, testing just got harder! But the older parts found their way into homebrew CB and 2m amateur gear :) when most others were still using BJT!

He is doing DC measurements. So we should think about Gate to Source capacitance
Agreed it's worth a try though reducing the lead lengths of both AWG input and scope will help too as the device goes through transition. There's a lot of common mode injection going on there due to the scope ground return.
 
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