Hello,

We have a board design which is under development and not finalized yet. We have analog voltage domain in which all the analog devices are connected. We also have some digital devices for which we need digital volage to power them up. We would like to keep analog and digital voltages separate, so that noise from digital does not enter in the analog voltage devices.

The input power to the board is provided by just one power line (VCC, GND) and we can not request sperate power lines for analog and digital.

The question is how to split the power so that we have separate analog and digital voltages. I guess we need filtering. Any suggestion how this can be done ?

 

Hello,

We have a board design which is under development and not finalized yet. We have analog voltage domain in which all the analog devices are connected. We also have some digital devices for which we need digital volage to power them up. We would like to keep analog and digital voltages separate, so that noise from digital does not enter in the analog voltage devices.

The input power to the board is provided by just one power line (VCC, GND) and we can not request sperate power lines for analog and digital.

The question is how to split the power so that we have separate analog and digital voltages. I guess we need filtering. Any suggestion how this can be done ?

There are a few strategies that can be used in some combination, depending on what the particular sensitivities are. A lot also depends on how many layers you are using.

Physically grouping your analog and digital components into separate areas is the first thing to shoot for. Then use a single-point (star) distribution scheme for your DC power such that the analog and digital power and ground only come together at the power-entry point. Place pretty stiff bypass capacitors at this point. You can put ferrite beads in the lines branching out from the star so that high frequency noise in one section gets attenuated before reaching the star and then attenuated again before going out into another branch. Then you can distribute moderate bulk-storage capacitors around each section to stiffen them up locally and provide a reservoir for decade-tiered bypass capacitors at every chip (multiple on chips that have multiple power pins). The best way to reduce noise pickup is to not generate the noise in the first place, so another thing to consider is to slow the edges of the transitions on the digital signals so that they aren't any faster than they need to be to function reliably. This will reduce the high-frequency harmonics, both conducted and radiated. Finally (though I'm sure I'm overlooking something), pay close attention to image signal routes in both your analog and digital traces. Essentially, map out the path that the return has to take to get back to its source. The higher the frequency (including the higher frequency spectral components), the closer it is going to try to stay to the signal trace itself. But if the trace traverses any discontinuities, such as a cut in a ground place or jumping to a different layer through a via, the image signal has to expand out and find a viable path around the discontinuity and back to the signal trace. This forms a loop antenna which will both radiate and pick-up noise, so you want to keep the size of these loops as small as possible. One way to do this is to use stitching capacitors next to the trace to bridge the discontinuity. These can tie the planes together such that, at high frequencies, you have a multi-point ground, which is preferred for high frequency signals, while still retaining the single-point behavior at low frequencies. Beyond all of this, you can start using things like guard traces between sensitive signal traces and shields over sensitive components and circuit portions.

To a large degree, this is a black art. But by following general best-practices you can usually achieve acceptable results without spending a lot of resources on analysis and design. But it can be overkill. Since most of my designs were one-off prototypes and test systems, I was more than willing to go for the overkill upfront; the result was that all of my boards performed extremely well, including some designs that were so noise sensitive that we actually had to suppress the clock on our chip and run the on-chip logic needed during sample acquisition fully asynchronously (which, having previously been successful and getting the company to adopt a no-asynchronous-logic policy, I got tasked with designing the asynchronous logic on that chip and all subsequent chips that had to have it) because it was SO sensitive to noise. But if I were designing something for a high-volume consumer market (which I never did), I would have probably built a prototype using what I thought was the minimum cost approach, emphasizing good layout and image signal management, and if it wasn't acceptable I would have brought in a consultant that was proficient at low-noise mixed-signal design and layout to bring it up to snuff.

 

Your question is missing a lot of detail.

Application?

Highest digital signal frequency?

Or, more accurately, shortest digital signal pulse width?

Highest analog signal frequency of interest (including harmonics)?

Highest and lowest analog signal voltage levels?

Analog section current draw?

Digital section current draw?

ak

 

The input power to the board is provided by just one power line (VCC, GND) and we can not request sperate power lines for analog and digital.

We have too little information!
You can start out at the power connector with two CLC filters. One powers the digital and the other powers the analog. This keeps noise from entering from the power supply and separates the power into two supplies.

 

Use an analog ground plane under the analog circuitry, and a separate digital ground plane under the digital circuitry (they can be on the same layer).
If there is a mixed-signal device such as an ADC or DAC, than have them straddle the two ground planes.
If there are signals going between the analog and digital circuits, then connect the two planes together at one point using a ferrite bead (surface mount package) connection.
(It is good practice to provide several mounting pads at various places where the two planes are adjacent, and then determine which is the best location for the single bead connection based on the analog noise level during testing).

And follow all of WBahn's recommendations for separate power supply connections, filtering, and isolation.

 

You could, possibly, raise the V+ a few volts and then use two regulators, one for the analog portion and the other for the digital portion. AND be sure to provide adequate shunt capacitors, as has already been mentioned.

 

you have the key of the problem
but at some point , the digital ground and analog ground must join .
unhelpfully, there are two camps, which are mutualy exclusive.
a. one ground plane, keep track of where current flows such as digital ground current does not go near analog ground current
b. two ground planes , commoned at one point, normaly by where power enteres board. take care with signals crosssing ground gaps.

Ive worked on both , both have worked well

 

If you can afford to lose 0.7V on the supplies, you can isolate them on the board with diodes. You will need to decouple each supply too.

 

Use ferrite beads instead of diodes.

 

Use ferrite beads instead of diodes.

Ferrite beads are better for very high frequency noise but diodes are much better for audio and low radio frequencies, so use both!

 

I was reading about Ferrite Beads Vs Inductors and found the following.

"Ferrite Beads Vs Inductors: Understanding The Differences ...Ferrite beads and inductors are both magnetic components used in circuits, but they serve different purposes. Ferrite beads act as high-frequency resistors, suppressing electromagnetic interference (EMI) and noise by converting it into heat. Inductors store energy in a magnetic field, acting as filters for lower frequencies and power management, passing DC while blocking AC."

I guess both will have to be connected in series and will have voltage drop due to series resistance. Usually how much is the resistance when we connect them in series ?

 

I was reading about Ferrite Beads Vs Inductors and found the following.

"Ferrite Beads Vs Inductors: Understanding The Differences ...Ferrite beads and inductors are both magnetic components used in circuits, but they serve different purposes. Ferrite beads act as high-frequency resistors, suppressing electromagnetic interference (EMI) and noise by converting it into heat. Inductors store energy in a magnetic field, acting as filters for lower frequencies and power management, passing DC while blocking AC."

I guess both will have to be connected in series and will have voltage drop due to series resistance. Usually how much is the resistance when we connect them in series ?

for info, which AI tool is that resume from? its not bad.

your right re resistances add in series , look at some data sheets . we tend to use BLM type in line inductors .

in general,
"blm" type inductors are used frequently on the board, like on every power pin of chips , to keep the high frequency noise from the chips from radiating onto the power tracks of the board.
bigger inductors are used on psu inputs to stop lower frequency noise entering or exiting the board.

board power supply design needs a multi layered approach. its more analog design than digital.