you list NAND 7400 but #3 uses 7408 AND - ? so you need to rewire this thing for NAND
and i don't think #3 works as BCD adder coz the carry is set at outputs (12 to 15) or (6,7,14,15) or (16 to 31)
wy to se t carry at 6,7 ?
you need to set carry extra to 16 and beyond at 10 to 15 that'd be
10 1010
11 1011 -- AND(S4,S2) // the lower AND in Fig #3 is connected wrong or shown wrong or both
12 1100 -- OR AND(S4,S3)
13 1101
14 1110
15 1111
-- suppose we connect the lower and "right"
and our carry is now correct
so for nubers >=10 the sum is extra incremented by 6 as 10=10*((carry=1) OR 1)+((10+6) MOD 16) 10 + i = 10*carry + (((10+i) mod 16 + 6*carry) MOD 16) =10*carry + i
--- so remake it for NAND instead of AND
your carry is currently carry = C10 = CO or (S4 and S2) or (S4 and S3)
the carry cant be converted using boolean algebra
but paying attention to function where NAND=0 if both inputs are 1 otherwise it's 1
so we need to avoid settin our NAND-s while SUM <=9 ... obvously we need 1 NAND to invert a bit for that
0 0000 0
1 0001 0
2 0010 0
3 0011 0
4 0100 0
5 0101 0
6 0110 0
7 0111 0
8 1000 0
9 1001 0
A 1010 1
B 1011 1
C 1100 1
D 1101 1
E 1110 1
F 1111 1
it likely is more likely if part of the sum is formed in one adder and part in an other - but it's not shure it can be done so
it may also be your teacher was drunk? giving such a task ...
i dont think it has solution using the components you listed with partial summing eighter coz if we bit mask one operand to 1001 0110 then
the condition that has to correct the final modulus would had to change it's input causing indefinit/strobing output if we bit mask the mod 10 e.g. 1010 0101 we'd be adding hopefully 0 or10 to our sum but also 8 or 2 the least likely can't be set to form what is required
change the school ? "We teach here everything that can't be done!" -- weird motto