How to 'feel' the difference in impedence looking through Drain or Source?

Thread Starter

Suyash Shandilya

Joined Sep 14, 2016
11
I understand basic analog electronics and network thery concepts. Have been doing a few questions lately. I can derive, using the small signal model the exact formula to compute the impedance seen while looking into a MOSFET or JFET from its drain or source terminal. I can mathematically understand that it is higher when looking through drain than when looking through source. BUT HOW?

I want to understand this qualitatively. Maybe it is the general case while looking into any current source from its either end but I want to seek a verbal description.

Thanks in advance to all those who will be replying. I really love this forum.
 

GopherT

Joined Nov 23, 2012
7,983
I understand basic analog electronics and network thery concepts. Have been doing a few questions lately. I can derive, using the small signal model the exact formula to compute the impedance seen while looking into a MOSFET or JFET from its drain or source terminal. I can mathematically understand that it is higher when looking through drain than when looking through source. BUT HOW?

I want to understand this qualitatively. Maybe it is the general case while looking into any current source from its either end but I want to seek a verbal description.

Thanks in advance to all those who will be replying. I really love this forum.
Are you referring to the “body diode” that allows reverse current to flow?
 

Thread Starter

Suyash Shandilya

Joined Sep 14, 2016
11
No. Not at all. All I am saying is that impedance looking through source is a relation like [rDS + Rd]/[1 + GmRds] Which is a much smaller value as compared to Gm.Rds.Rs + Rds + Rs which is the relation for Drain impedance. I want to know how are these values so different in magnitude. How do I physically visuallise this? After all, a MOSFET is innately symmetric.
 

crutschow

Joined Mar 14, 2008
23,291
The difference is because the gate-source voltage controls the drain-source current whereas the gate-drain voltage has little effect on that current.
So since the gate-drain voltage has little effect on the current, the impedance looking into the drain is quite high.
That's why it can be considered a current source.

But a change in the source voltage (with the gate voltage fixed) changes the gate-source voltage such as to change the drain-source current in the same direction as the change in source voltage, making it appear that the source impedance is low.

Due to the inherent symmetry of a FET (as you noted) the terminal determined to be the drain is the one that is most positive for an N-FET, and most negative for a P-FET.
 

Thread Starter

Suyash Shandilya

Joined Sep 14, 2016
11
Y
The difference is because the gate-source voltage controls the drain-source current whereas the gate-drain voltage has little effect on that current.
So since the gate-drain voltage has little effect on the current, the impedance looking into the drain is quite high.
That's why it can be considered a current source.

But a change in the source voltage (with the gate voltage fixed) changes the gate-source voltage such as to change the drain-source current in the same direction as the change in source voltage, making it appear that the source impedance is low.

Due to the inherent symmetry of a FET (as you noted) the terminal determined to be the drain is the one that is most positive for an N-FET, and most negative for a P-FET.
Yes... This is something I was looking for. I understand it now. Thanks a lot. :) :) :)
 
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