How to drive 2 NMOS mosfets using an isolated supply

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Bakez

Joined Aug 21, 2012
31
I have two NMOS MOSFETs in a half-bridge configuration
The problem is that they need to drive the load from -10V to +15V. See the attached schematic

Therefore they are both high side MOSFETs and I need to drive them with an isolated supply from say -5V to +5V (also the control signal has to be isolated)

Can anyone explain how I can do this with discrete components, for example using NPN/PNP transistors?
I have tried the circuit from this blog but it never works properly in LTspice. The MOSFETs take way too long to turn off (like 100us) and they only have 0.69n of gate capacitance.

 

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ronv

Joined Nov 12, 2008
3,770
I have two NMOS MOSFETs in a half-bridge configuration
The problem is that they need to drive the load from -10V to +15V. See the attached schematic

Therefore they are both high side MOSFETs and I need to drive them with an isolated supply from say -5V to +5V (also the control signal has to be isolated)

Can anyone explain how I can do this with discrete components, for example using NPN/PNP transistors?
I have tried the circuit from this blog but it never works properly in LTspice. The MOSFETs take way too long to turn off (like 100us) and they only have 0.69n of gate capacitance.

Optos are kind of slow. But you can speed it up by making R6 much smaller.
 

ScottWang

Joined Aug 23, 2012
7,397
I have two NMOS MOSFETs in a half-bridge configuration
Is it must be or just you want to use it that way?
If using one p mosfet and one n mosfet is it ok?

The problem is that they need to drive the load from -10V to +15V. See the attached schematic
What kind of the load is it? (needs more info, links)

Therefore they are both high side MOSFETs and I need to drive them with an isolated supply from say -5V to +5V (also the control signal has to be isolated)
What kind of the input signal, sensor, current (mA)?
 

crutschow

Joined Mar 14, 2008
34,285
A 6N136 opto is reasonably fast.
LTspice simulation below:
Is that fast enough?

upload_2017-2-8_23-52-29.png

Below is a simulation using six CD4050 CMOS buffers in parallel (one package) in place of the two transistors as a driver.
It shows faster rise and fall times then the transistor driver in simulation, but I'm not sure how much improvement you will see in practice. It depends upon how accurate the models are.

upload_2017-2-9_0-7-45.png
 

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