how to derive circuit for 8:3 priority encoder(ic 74148) on paper?

Discussion in 'Digital Circuit Design' started by mj0, Jun 17, 2017.

  1. mj0

    Thread Starter New Member

    Jun 17, 2017
    1
    0
    i know k map simplification upto 5 variable and variable entered map technique.so it would be nice if you can help me using above mentioned methods or if any other method is there please share that method from basics.i don't want to mug up that circuit and would be asked to draw on paper in exam so suggest method which can be on paper not using software.thank you.
     
  2. Papabravo

    Expert

    Feb 24, 2006
    11,629
    2,438
    You start by writing out the minterms for each output bit, making sure you observe the use of don't care conditions. Then you use the method of prime implicants to reduce the circuitry if possible. It should be obvious by inspection if this is possible or not.
     
  3. WBahn

    Moderator

    Mar 31, 2012
    22,855
    6,819
    Your first step is to be sure that you understand the problem -- this is often the hardest part.

    If you just say that you want an 8:3 priority encoder, that implies certain behaviors, but also leaves the door open on some other behaviors. You need to nail those down before you start designing. For instance, what should the output be if none of the inputs are asserted?

    When you give a specific part number, such as 74148, that implies that you want to mimic the behavior of that specific component. But do you want to mimic ALL of the behavior, or is the part number given just to give an idea of the general behavior you want. For instance, the inputs and outputs on the 74148 are all active-LO and there is also cascading circuitry; are these part of what you are supposed to implement in your circuit?

    So first define the exact behavior you want the circuitry to have. Do it in a way so that you could hand it to two other people and have one of them design and implement it and the other person test it and determine if it meets your specs. If you do this on an exam then even if you mess up everything from this point on you will probably get some decent partial credit. Also, if you misinterpret the problem you will probably limit the points hit to just that misinterpretation if the rest of your work is correct according to your spec.

    Next you have two basic options to proceed with the design. The first is to ignore what the concept of the circuit is and just go with the specified behavior -- the truth table, as it were -- and start turning the crank on a design process that is generic but pretty much guaranteed to work, but might be cumbersome and long winded. The other is to exploit the concept behind what the circuit is doing to greatly simplify matters. For instance, for the basic 8:3 encoder you know that if any of the high four bits are asserted that you want the msb of the output to be asserted. That's a single 4-input OR gate and you already have a third of your outputs taken care of. What you are doing here is looking for exploitable patterns. Of course, you can combine these two approaches and first look for exploitable patterns to implement the low-hanging fruit and then fall back on the generic approaches to get the rest.
     
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