hii guys
i want to make high power output buffer driver of about rms 150 watts for my amplifier using power transistors like 2SC5200 and 2SA1943. i have +-12 volt power supply and wanna drive 4 ohm load. actually i tried some circuit like classic class B push pull amplifier but its output was very distorted so i decided to minimize crossover distortion by using two diodes along with resisters to bias transistors. this biasing scheme led to very much heat dissipation and i rejected this due to high power loss. then i considered walt jungs buffer circuit . but it is also not working( i am really not getting any mistake in my circuit and dont know why it is not working). please suggest me some suitable circuit design for my amplifier.
thanks in advance

 

Try the 0.5Ω resistors in series with the emitters of each transistor in the first circuit and see if that helps.

 

Try the 0.5Ω resistors in series with the emitters of each transistor in the first circuit and see if that helps.

thank you very much for this. actually my circuit works when i connect only one supply wire ( either + 12v or _12 v) . when i connect both wires , transisters starts heating and no output comes. i will try your modification
thank you again

 

18 W is the theoretical max power for +/-12 V and 4 ohms with a linear amplifier. In a real circuit the output will be 15 W or less.

ak

 

18 W is the theoretical max power for +/-12 V and 4 ohms with a linear amplifier. In a real circuit the output will be 15 W or less.

ak

the formula p= v*v/8r is for single pair of transistors. i will use parallel pairs and bridge configuration to increase output. this may give satisfactory amount of power using this supply.

 

Output Power Boost for Op Amps
[URL='http://forum.allaboutcircuits.com/threads/wendys-index.112710/']Wendy's Index[/URL]

 

the formula p= v*v/8r is for single pair of transistors. i will use parallel pairs and bridge configuration to increase output. this may give satisfactory amount of power using this supply.

That formula if for peak power if v is the power supply voltage
Thus you would have a theoretical maximum of 72Wrms into 4Ω for ±12V supplies and a bridge output.
You can get near that if you use a bootstrap drive for the output transistors.

Also the base drive is not sufficient for the top circuit to achieve that output (a 12V peak output of 3A into a 4Ω load, requires at leas 200ma into the transistor base).
You would need a Darlington or other driver to boost the output current.

 

That formula if for peak power if v is the power supply voltage
Thus you would have a theoretical maximum of 72Wrms into 4Ω for ±12V supplies and a bridge output.
You can get near that if you use a bootstrap drive for the output transistors.

Also the base drive is not sufficient for the top circuit to achieve that output (a 12V peak output of 3A into a 4Ω load, requires at leas 200ma into the transistor base).
You would need a Darlington or other driver to boost the output current.

thank you again for darlington pairs. maybe this is the problem with my circuit. i will try this modification

 

See

 

See
View attachment 128417

will this circuit work for +-12 volt supply. i am available with that supply only.if any modification is needed , please suggest me(like resistance values may be decreased) furthermore, in place of MJL4281/MJL4302 can i use 2SC5200/2SA1943 pair and in place of DMMT5401/DMMT5551 the general purpose BC557B/BC547 transistors. thank you very much for this buffer circuit.

 

Yes.


Poutput=5.9W ==>
Fourier components of V(out)
DC component:-0.0161275

Harmonic Frequency Fourier Normalized Phase Normalized
Number [Hz] Component Component [degree] Phase [deg]
1 1.000e+03 9.722e+00 1.000e+00 -0.00° 0.00°
2 2.000e+03 6.693e-04 6.885e-05 -91.71° -91.71°
3 3.000e+03 2.407e-02 2.475e-03 0.16° 0.16°
4 4.000e+03 7.413e-05 7.625e-06 -90.20° -90.20°
5 5.000e+03 6.119e-03 6.294e-04 -0.34° -0.34°
6 6.000e+03 1.871e-05 1.925e-06 -26.29° -26.29°
7 7.000e+03 3.032e-04 3.118e-05 165.19° 165.19°
8 8.000e+03 1.581e-05 1.626e-06 88.03° 88.03°
9 9.000e+03 1.959e-03 2.015e-04 -179.83° -179.82°
Total Harmonic Distortion: 0.256322%(0.259317%)

The main contribution is made by the third harmonic

 

For a different approach, here's the LTspice simulation of a complementary bootstrapped MOSFET follower output.
It uses two BJTs connected in a sort of current-mirror arrangement to cancel each MOSFET's Vgs offset.
This also makes the bias current relatively insensitive to the MOSFET temperature.

The capacitors from the output to the bias resistors, along with the diodes provide a bootstrap feedback that allows the output to go essentially to the rail voltage (whereas the BJT stage can only go to within about a volt of the rails).
This can be seen in the simulation with a 12V peak output and ±12v supplies.
The output voltage closely follows the input.

The zero bias MOSFET current is about 100mA.

The output power is 17.1W average (commonly called rms) into a 4Ω load.
A bridge output would thus have an output power of about 68W(ave) into 4Ω.

The FFT shows the 3rd harmonic being over 55dB below the +18dB (12V peak) fundamental.

 

Yes.

View attachment 128470
Poutput=5.9W ==>
Fourier components of V(out)
DC component:-0.0161275

Harmonic Frequency Fourier Normalized Phase Normalized
Number [Hz] Component Component [degree] Phase [deg]
1 1.000e+03 9.722e+00 1.000e+00 -0.00° 0.00°
2 2.000e+03 6.693e-04 6.885e-05 -91.71° -91.71°
3 3.000e+03 2.407e-02 2.475e-03 0.16° 0.16°
4 4.000e+03 7.413e-05 7.625e-06 -90.20° -90.20°
5 5.000e+03 6.119e-03 6.294e-04 -0.34° -0.34°
6 6.000e+03 1.871e-05 1.925e-06 -26.29° -26.29°
7 7.000e+03 3.032e-04 3.118e-05 165.19° 165.19°
8 8.000e+03 1.581e-05 1.626e-06 88.03° 88.03°
9 9.000e+03 1.959e-03 2.015e-04 -179.83° -179.82°
Total Harmonic Distortion: 0.256322%(0.259317%)

The main contribution is made by the third harmonic
View attachment 128471

thank you very much for this simulation. i am going to implement this buffer and hopes to work correctly.
i am thankful to you for this

 

For a different approach, here's the LTspice simulation of a complementary bootstrapped MOSFET follower output.
It uses two BJTs connected in a sort of current-mirror arrangement to cancel each MOSFET's Vgs offset.
This also makes the bias current relatively insensitive to the MOSFET temperature.

The capacitors from the output to the bias resistors, along with the diodes provide a bootstrap feedback that allows the output to go essentially to the rail voltage (whereas the BJT stage can only go to within about a volt of the rails).
This can be seen in the simulation with a 12V peak output and ±12v supplies.
The output voltage closely follows the input.

The zero bias MOSFET current is about 100mA.

The output power is 17.1W average (commonly called rms) into a 4Ω load.
A bridge output would thus have an output power of about 68W(ave) into 4Ω.

The FFT shows the 3rd harmonic being over 55dB below the +18dB (12V peak) fundamental.

View attachment 128477

View attachment 128475

i am happy to see this much amount of power. the question is if i use transisters in place of mosfets, what will be the performance of the circuit. please send me ltspice of that circuit like this one.
i will be thankful to you for this

 

the question is if i use transisters in place of mosfets, what will be the performance of the circuit. please send me ltspice of that circuit like this one.

Sorry, that circuit only works effectively with the high impedance input of MOSFETs.