Help Evaluating Ethernet Backplane Architecture – Magnetics, Parallel PHYs, and Alternatives

Hi all,

I’m working on a modular system with multiple carrier boards, each containing:

• A CPU
• Ethernet PHY
• Magnetics

These carrier boards connect via a shared Ethernet backplane to a centralized ETH controller board. The controller board hosts:

• An Ethernet switch
• Multiple PHYs + magnetics
• External RJ45s or optional ETH daughter boards for expansion

Here’s a simplified block diagram of the setup (attached image):
ethernet architecture.png

System Hypotheses:

1. All carrier boards must access an external ETH daughter board via the controller.
2. Carrier boards must be able to communicate with each other via Ethernet.
3. The design should allow future ETH daughter board add-ons.

I’d appreciate guidance on these specific questions:



1. Magnetics — what’s actually required?

• Do both the carrier boards and the ETH controller board need magnetics?
• Or can PHY-to-switch connections over the backplane be done without transformers (e.g. using transformerless MDI coupling)?

2. Can I connect all carrier boards in parallel to the same Ethernet traces (backplane)?

• Will this create signal integrity problems or collisions?
• Or does each PHY need to connect to a dedicated switch port?

3. Is there a better way to achieve this?

• Would you recommend a different topology (e.g., backplane with switch IC and SERDES lanes)?
• Any suggestions for improving modularity while maintaining Ethernet compliance?

Thanks in advance for any feedback! This is for a custom embedded project with tight space constraints and strict performance requirements.