we are evaluating MIC21LV32 from microchip in one of our applications.
For the current sensing we have used 3mΩ sense resistor(1206,1%,1W), as these sense resistors have higher ESL+ parasitic inductance in PCB. During testing with R1=R3=100Ω, No C2,C3,C4, we are seeing large spikes on CSP-CSN nodes.
My question is, for the current sense filter circuit (R1, R3, C2, C3, C4) below,
how can I decide the values of Input filter components (R1, R3, C2, C3, C4) so, that I can get clean voltage across 3mΩ resistor alone even though ESL present.
Below is the simulated circuit.
Below is the response of the circuit.
I have chosen Common mode filter values (R1, R3, C3, C4) and, Differential mode filter values (R1, R3, C2) randomly.
With same values I have done testing, but I do not see such improvement in the captured waveforms. Simulation to Actual HW only difference is AGND & DGND are connected at one place(near thermal pad), in simulation i have shorted it directly.
How can i go systematically to improve the response of the circuit?
For the current sensing we have used 3mΩ sense resistor(1206,1%,1W), as these sense resistors have higher ESL+ parasitic inductance in PCB. During testing with R1=R3=100Ω, No C2,C3,C4, we are seeing large spikes on CSP-CSN nodes.
My question is, for the current sense filter circuit (R1, R3, C2, C3, C4) below,
how can I decide the values of Input filter components (R1, R3, C2, C3, C4) so, that I can get clean voltage across 3mΩ resistor alone even though ESL present.
Below is the simulated circuit.
Below is the response of the circuit.
I have chosen Common mode filter values (R1, R3, C3, C4) and, Differential mode filter values (R1, R3, C2) randomly.
With same values I have done testing, but I do not see such improvement in the captured waveforms. Simulation to Actual HW only difference is AGND & DGND are connected at one place(near thermal pad), in simulation i have shorted it directly.
How can i go systematically to improve the response of the circuit?
