Fully differential with CMFB

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AnalogDesigner9797

Joined Jan 16, 2023
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Hello all,

I'm required to design a fully differential amplifier with CMFB.
the minimal requirements are:

Vdd=2 [v]
closed loop gain=2
Dynamic range at output, DR >80 [db]
settling error<0.5 mV
settling time<50 ns
load capacitance 10 pF
phase margin >60 degrees
power keeping low as possible

I would like to get some ideas for specific circuits that can satisfy those requirements.
any other tips for this design are very welcomed!

thanks in advaned!
 

MrChips

Joined Oct 2, 2009
30,802
Thread moved to Homework Help.

The rules for Homework Help are that you must show what you have done so far. Only then we can give you feedback and guidance. We will not do your homework for you.
 

dl324

Joined Mar 30, 2015
16,916
we are not sure if it is a smart idea to continue with this circuit. the phase margin needed is quite big.
Circuit in question:
1673889332154.png
The transistor symbols are non-standard. Are they supposed to be enhancement mode MOSFETs?

Using humps with connection dots went out of style decades ago...
 
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