So I have part of an assignment to "Establish a design for a full address decode circuit for four 256k by 16-bit components connected to a 24-bit address bus, so that the memories are arranged at consecutive addresses beginning at zero".
Unfortunately I missed the first relevant lecture, and the lecturer's notes are rubbish.
Am I right to think that lines A0-A15 are common to all chips; A16 & A17 need to go through a 2 to 4 demux to the chip selects; and that lines A18 - A23 are unused and so just all stay as '0's?
I think the main thing I'm unclear on is what, exactly, the "256k by 16-bit" means: the 16-bit specifically. Is that the number of pins for the address lines, or data lines? What am I supposed to know from being given that info?
Unfortunately I missed the first relevant lecture, and the lecturer's notes are rubbish.
Am I right to think that lines A0-A15 are common to all chips; A16 & A17 need to go through a 2 to 4 demux to the chip selects; and that lines A18 - A23 are unused and so just all stay as '0's?
I think the main thing I'm unclear on is what, exactly, the "256k by 16-bit" means: the 16-bit specifically. Is that the number of pins for the address lines, or data lines? What am I supposed to know from being given that info?