If you want a digital output, you're going to need more than one transistor.

A half adder takes an XOR and an AND gate. A full adder can be implemented with two half adders and an OR gate.

how do i get

If you want a digital output, you're going to need more than one transistor.

A half adder takes an XOR and an AND gate. A full adder can be implemented with two half adders and an OR gate.

Referring to a new article i have created this new full adder using diodes and resistors now
https://hackaday.io/project/11860-diodes-only/log/52981-diode-full-adder
how do i get output in this?

 

You have an analogue output circuit, but the posted do.png image is for a digital output circuit.
Instead of using that 'destructible' circuit you could build a full adder using the LTspice standard digital gates.

Referring to a new article i have created this new full adder using diodes and resistors now
https://hackaday.io/project/11860-diodes-only/log/52981-diode-full-adder
how do i get output in this?
i have attached ther asc file below

 

hi,
If you don't post your asc file I cannot determine where the plot Nodes are.?
Also use Labels ie: A,B etc.
E

BTW:
When you ran my asc file, did you get the same results as me.??

Referring to a new article i have created this new full adder using diodes and resistors now
https://hackaday.io/project/11860-diodes-only/log/52981-diode-full-adder
how do i get output in this?

 

hi 680,
Did you see this clip from that site.?
It requires inverted and true inputs for A, B, and CarryIn, and output buffers for Sum, CarryOut and /CarryOut, but that's only 6 inverters.
E

 

hi 680,
Did you see this clip from that site.?
It requires inverted and true inputs for A, B, and CarryIn, and output buffers for Sum, CarryOut and /CarryOut, but that's only 6 inverters.
E

what is actually meant by inverters here i read that but i didnt understand that actually should i simply attach voltage cells with step inputs like u and I did in the previous file and for inversion reverse the polarity?

 

hi 680,
This is a starting point for testing.
I think the circuit is 'Yuk!' lacking many features, give it a go and add any changes.

 

hi 680,
This is a starting point for testing.
I think the circuit is 'Yuk!' lacking many features, give it a go and add any changes.

thanks i will try working on it but i hope this is better than my previous yesterday's circuit?

 

Since you need AND, XOR and OR functions I suggest you make and test those individually first; then you can bolt them together as appropriate.
As with most circuit designs and simulations, it helps to break the problem down into sections and get each section working first.

 

hi 680,
A tidier version of the circuit.
Set the Puls High/Low periods for A,B, CYI to suit your sim.
E

 

hi 680,
This is a starting point for testing.
I think the circuit is 'Yuk!' lacking many features, give it a go and add any changes.

I dont have the 74hct14 inverter in my Ltspice library what else can I use in its place? Or can u please send me its .txt file so that i can import that into my circuit

 

hi,
Do you have any logic IC inverters in your LTS other than 74hct14.?

E

 

hi 680,
A tidier version of the circuit.
Set the Puls High/Low periods for A,B, CYI to suit your sim.
E

hello thanks a lot for your help! "Set the Puls High/Low periods for A,B, CYI to suit your sim" can you please elaborate this ? if possible can u please send me that file so i can import it into my LTspice.

 

hi,
Do you have any logic IC inverters in your LTS other than 74hct14.?

E

Does this work?

 

hi,
You must add the Values as shown here.
Look at the LTS Help if you wish to set other parameters.

Right click on the Inv symbol to bring up the window
E


BTW: there is also a Schmitt symbol in Digital, you may need to the Threshold levels to suit,

 

hi 680,
A tidier version of the circuit.
Set the Puls High/Low periods for A,B, CYI to suit your sim.
E

here is the output i have obtained using the alternative inverter and here is how a full adder desired output looks like

 

hi 680.
Looks OK to me.
Please post your LTS asc file.
When is the next step in the project.
E


Update:
Are you trying to satisfy all the possible states.?

 

hi,
You must add the Values as shown here.
Look at the LTS Help if you wish to set other parameters.

Right click on the Inv symbol to bring up the window
E


BTW: there is also a Schmitt symbol in Digital, you may need to the Threshold levels to suit,

I have set the High and low parameters of V u have mentioned to me however i dont see any changes in output waveform

 

hi 680.
Looks OK to me.
Please post your LTS asc file.
When is the next step in the project.
E

here is the latest asc file i have edited. By next step in project do u mean when i have to submit it? I have to submit it in the next 24 hours

 

hi 680.
Looks OK to me.
Please post your LTS asc file.
When is the next step in the project.
E


Update:
Are you trying to satisfy all the possible states.?

yes actually i am trying to achieve these many states

 

hi 680,
The point I am making is that the test pattern of A, B CYi , of the LTS is set to prove the OR function.

In order to check the full adder operation you need to modify the A,B CYin test voltages , so that you get all the possible input states.

Do you follow what I am saying.
E