Can the Drain and Source for a P-channel enhancement FET be swapped??

I have a circuit that has a P-channel Enhancement mode FET with the drain connected to +5V. The Gate is either pulled to +5V via a pull-up resistor or pulled LO via another transistor. The source of the FET is connected to the output signal.

The transistor works fine when the gate is pulled to 0V (connects the source to +5V drain.) However, when the gate is pulled to +5V, the FET holds the source at +4.72V instead of being disconnected. I am wondering whether the source and drain are simply swapped by mistake?? Any help....

Thanks!!

 

They are not interchangeable, especially if the MOSFET has an internal substrate diode. You would always see some voltage at the drain due to this diode, which is what you are experiencing now, I suspect.

 

hi

for further info there are JFETs whose Drain & Source can be intechangeable without adverse effect on the circuit, but there are w/c are not. the schem symbol of those JFETs must always be look at carefully.

i have attach the schem of the interchangeable and the non.

moz

 

Hello,

thanx for the help. Mozikluv, I actually have a BSS84 FET instead of a JFET (attached schematic.) Would the drain and source on this be interchangable?? My guess is not....

Thanks!!

 

Originally posted by skysurf@Nov 28 2005, 01:06 PM
Hello,

thanx for the help. Mozikluv, I actually have a BSS84 FET instead of a JFET (attached schematic.) Would the drain and source on this be interchangable?? My guess is not....

Thanks!!

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hi,

i may sound redundant, but that is what "n93" has pointed out. it has an imbedded diode protection.