I can't do the part where the circuit stops automatically. I copy the wording and then tell what I've done.
We will create a sequential circuit that generates Fibonacci numbers.
\(F_0 = 0;\ F_1 = 1;\ ....;\ F_n = F_{n-1} + F_{n-2}\ for\ n = 2, 3, 4\ldots\)
Specifically, the size of the records should be 6 bits.
When (at the end) the design works, let's turn it into a real circuit that knows how to "take off and land". For this we need as input signals
I gave my best shot at it. The deadline has passed so please give it your best shot.
We will create a sequential circuit that generates Fibonacci numbers.
\(F_0 = 0;\ F_1 = 1;\ ....;\ F_n = F_{n-1} + F_{n-2}\ for\ n = 2, 3, 4\ldots\)
Specifically, the size of the records should be 6 bits.
When (at the end) the design works, let's turn it into a real circuit that knows how to "take off and land". For this we need as input signals
- A "reset" signal, which leaves the circuit at the initial values
- A "start" signal to read the number n and start the computation of the number of
Fibonacci - The number n encoded with 4 bits.
- The number "Fn" coded with 6 bits
- A "halt" signal saying that computing is over

I gave my best shot at it. The deadline has passed so please give it your best shot.