I am interested in knowing how a N channel FET works and a P channel FET works. The differences between the 2. The relationship between the gate voltage and the source voltage on a N channel MOSFET. how does it trigger the Transistor ON and OFF in relation to the Gate voltage and Source voltage. Which type of FET is better for Which application. How to match the capacitive input for a MOSFET so that there is lowest time delay for switching the MOSFET.What is high side switching and what is Low side switching. If anyone knows any good websites that shed some light on these design topics please let me know.

 

http://en.wikipedia.org/wiki/Field_effect_transistor has an explaination on N channel FETs and P channel FETs.

 

The fundamental difference between N-channel (nMOS) and P-channel (pMOS) MOSFETs is that the polarity of the transistor voltages are opposite. Otherwise the fundamental operation is the same, i.e. the gate voltage creating a inversion layer in the channel from which an applied voltage across the source and drain causes a current to follow. You will notice that the transfer characteristics for nMOS and pMOS devices are a 180degree inversion about the origin.

An important difference between nMOS and pMOS devices is that since the primary charge carrier in pMOS devices is the "hole" (or absence of electrons) and the primary charge carrier in nMOS devices is the electron, where the electron has twice the mobility of the "hole", pMOS devices are slower due to the drain-current's direct dependancy on the mobility. This is a crucial characteristic that is exploited in CMOS circuit design, where the pMOS pull-up arrangements are configured in parallel, whereas the nMOS pull-down arrangements are configured in series.

Both Art of Electronics and Microelectronics Circuits (books) give a superb treatment of MOSFETS (and FET devices in general). If you get the chance I would recommend looking at both of these books for more information.

Dave

 

1)Gate volatges for nMOS should be around 12volts for proper operation.
2)There must be a gate resistor always possibly something like 27ohms so that there are no oscialltions in the gate and also the switch side. Also protects from high currents entering the gate and damaging it. The gate has capacitive properties and the resistor helps to keep time to charge it small. T=RC. As the switching frequency increases the resistor value plays a critical role for the damping of the signal and the affects the switching time delay for the FET. Frequencies in the order of 100'sKHz should have a resistor value well designed. There must be a formula to calculate this depending on the FET.
3)The 12V on the gate of nMOS FET switches it for maximum Ids.
4)Low side driver: when you are switching the FET so the the Source terminal is connected directly to ground. There may be a resistor on this side (small value but high power rating) since most current will flow through here. The resistor can be used to measure current flowing through the Gate and drain terms. The drain side is usually connected to a load (could be inductive, resistive or capacitive) Inductive and capacitive loads should always have snubber doides(aka freewheeling diodes,catch diodes) to prevent back emf from the coil to go and damage other components. The diode should be of fast recovery type since the voltage spikes could easily reach 3-4 times the supply to drain terminal. Low side switch pulls one side of the load terminal to ground thereby getting its name "LOW SIDE SWITCH". For FET switch to be ON on a n channel Low side switch: the voltage at the gate should be higher than the voltage at the source. For FET switch to be OFF n channel low side switch: The voltage at the gate should be less than or equal to the source voltage.
5)High side switches: the load is between the source and ground. The drain is connected to +ve supply.
6) P channel HIGH SIDE and LOW SIDE SWITCHES- Will post some things after reading about them.

PS. IF ANYONE HAS MORE TO ADD, HAS OTHER EXPLANATIONS OR FIND ANY MISGUIDANCE IN THE OVERVIEW ABOVE, PLEASE FEEL FREE TO COMMENT AND CORRECT ME. Thanks.

 

1)Gate volatges for nMOS should be around 12volts for proper operation.

Where have you found that from? The important voltage when considering the gates influence on the MOSFET operation is the gate-source voltage, Vgs. When Vgs < Vth (where Vth is the threshold voltage of the MOSET) then the MOSFET is switched off. When Vgs > Vth, then the mode of operation is dependant on drain-source voltage, Vds, and its magnitude with respect to how much Vgs is over Vth, i.e. Vgs - Vth.

Typically, Vth~0.7V or there abouts, and Vgs will range up to 5-10V dependant on application.

Dave