ifdef __P184520
CONFIG....
else
ERROR "Check config bits."
endif
;********************************
;** config.inc -- 18F84J90 **
;** Author: joeyd999 **
;** Derived from p18f84j90.inc **
;********************************
;define the processor and include the definitions
processor 18f84j90
include "p18f84j90.inc"
;configuration bit settings:
; Background Debugger Enable bit (define ICD to enable):
#ifdef ICD
config DEBUG = ON ;Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug
#else
config DEBUG = OFF ;Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins
#endif
; Extended Instruction Set Enable bit:
config XINST = OFF ;Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
; config XINST = ON ;Instruction set extension and Indexed Addressing mode enabled
;
; Stack Overflow/Underflow Reset Enable bit:
config STVREN = OFF ;Reset on stack overflow/underflow disabled
; config STVREN = ON ;Reset on stack overflow/underflow enabled
;
; Watchdog Timer Enable bit:
config WDTEN = OFF ;WDT disabled (control is placed on SWDTEN bit)
; config WDTEN = ON ;WDT enabled
; Code Protection bit (define ICD or NOCODEPROTECT to disable):
#ifdef ICD
config CP0 = OFF ;Program memory is not code-protected
#else
#ifdef NOCODEPROTECT
config CP0 = OFF ;Program memory is code-protected
else
config CP0 = ON ;Program memory is not code-protected
#endif
#endif
; Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit:
config IESO = OFF ;Two-Speed Start-up disabled
; config IESO = ON ;Two-Speed Start-up enabled
; Fail-Safe Clock Monitor Enable bit:
config FCMEN = OFF ;Fail-Safe Clock Monitor disabled
; config FCMEN = ON ;Fail-Safe Clock Monitor enabled
; Default/Reset System Clock Select bit:
config FOSC2 = OFF ;INTRC enabled as system clock when OSCCON<1:0> = 00
; config FOSC2 = ON ;Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00
; Oscillator Selection bits:
config FOSC = HS ;HS oscillator
; config FOSC = HSPLL ;HS oscillator, PLL enabled and under software control
; config FOSC = EC ;EC oscillator, CLKO function on OSC2
; config FOSC = ECPLL ;EC oscillator, PLL enabled and under software control, CLK function on OSC2
; Watchdog Timer Postscaler Select bits:
config WDTPS = 1 ;1:1
; config WDTPS = 2 ;1:2
; config WDTPS = 4 ;1:4
; config WDTPS = 8 ;1:8
; config WDTPS = 16 ;1:16
; config WDTPS = 32 ;1:32
; config WDTPS = 64 ;1:64
; config WDTPS = 128 ;1:128
; config WDTPS = 256 ;1:256
; config WDTPS = 512 ;1:512
; config WDTPS = 1024 ;1:1024
; config WDTPS = 2048 ;1:2048
; config WDTPS = 4096 ;1:4096
; config WDTPS = 8192 ;1:8192
; config WDTPS = 16384 ;1:16384
; config WDTPS = 32768 ;1:32768
;
; ECCP2 MUX bit:
; config CCP2MX = ALTERNATE ;ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode
config CCP2MX = DEFAULT ;ECCP2/P2A is multiplexed with RC1
When the device is erased prior to programming all bits in ROM, including the configuration word, are '1'. The config word will thus set the PIC to whatever '1' means in for the particular thing it controls. For the 12F683 FOSC bits in the CONFIG registerI read that PIC programmers erase the devices before every programming, including the configuration bits. Thus, the configuration bits are all set to "1" before the PIC is programmed. Based on your comments above, I surmise that this is not always true, i.e., it's still better to set them all in every program rather than depend on the bits not explicitly programmed being set to "1" by default. Correct?
111 = RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN
TITLE "PWM EXPLORER 01"
SUBTITLE "Started 15.06.09"
SUBTITLE "Completed 18.06.09"
SUBTITLE "Author Agustiin Tomaas Ferrari Nicolay - Buenos Aires"
;------------------------------------------------------------------------------
;Default radix is DECimal!
;Power control PWM testing, oriented to obtain a DC voltage range.
;XTAL = 4 MHz - HSPLL enabled.
;On line delay routines updated to 16 MHz (4 * 4 MHZ)
;------------------------------------------------------------------------------
Processor 18F4431
LIST B=4, C=80, MM=ON, R=DEC, ST=ON, T=OFF
INCLUDE "P18F4431.INC"
;------------------------------------------------------------------------------
CONFIG OSC =HSPLL ,FCMEN =OFF ,IESO =OFF ,PWRTEN =OFF ,BOREN =OFF
CONFIG BORV =27 ,WDTEN =OFF ,WINEN =OFF ,WDPS =1 ,T1OSCMX =OFF
CONFIG HPOL =HIGH ,LPOL =LOW ,PWMPIN =OFF ,MCLRE =ON ,EXCLKMX =RC3
CONFIG PWM4MX =RB5 ,SSPMX =RC7 ,FLTAMX =RC1 ,STVREN =ON ,LVP =OFF
CONFIG DEBUG =OFF ,CP0 =OFF ,CP1 =OFF ,CP2 =OFF ,CP3 =OFF
CONFIG CPB =OFF ,CPD =OFF ,WRT0 =OFF ,WRT1 =OFF ,WRT2 =OFF
CONFIG WRT3 =OFF ,WRTB =OFF ,WRTC =ON ,WRTD =OFF ,EBTR0 =OFF
CONFIG EBTR1 =OFF ,EBTR2 =OFF ,EBTR3 =OFF ,EBTRB =OFF