Hey. I am using the STM32cubeMX generated library to interface STM32F412 microcontroller with external PSRAM chip:
http://www.issi.com/WW/pdf/66-67WVE4M16EALL-BLL-CLL.pdf
There is a function to write some data to SRAM:
And according to the example, the function is being called like that:
Could someone clarify what is #define WRITE_READ_ADDR ((uint32_t)0x0800) used for? I was able to confirm that the peripheral address of FSMC is 0x6000000000 which is fine, however, I cannot seem to understand why do we have to 0x0800 (READ_WRITE_ADDRESS) to the peripheral adress when writing some data to external PSRAM device? I have not been able to find any relavant information on that in either the stm32 datasheet or the external PSRAM datasheet.
http://www.issi.com/WW/pdf/66-67WVE4M16EALL-BLL-CLL.pdf
There is a function to write some data to SRAM:
C:
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
{
__IO uint16_t * pSramAddress = (uint16_t *)pAddress;
/* Check the SRAM controller state */
if(hsram->State == HAL_SRAM_STATE_PROTECTED)
{
return HAL_ERROR;
}
/* Process Locked */
__HAL_LOCK(hsram);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_BUSY;
/* Write data to memory */
for(; BufferSize != 0U; BufferSize--)
{
*(__IO uint16_t *)pSramAddress = *pSrcBuffer;
pSrcBuffer++;
pSramAddress++;
}
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
C:
#define PSRAM_BUFFER_SIZE 0x0100
#define WRITE_READ_ADDR ((uint32_t)0x0800)
#define WRITING_OFFSET ((uint32_t)0xC20F)
#define PSRAM_BANK_ADDR ((uint32_t)0x60000000)
extern SRAM_HandleTypeDef hsram3;
/* Read/Write Buffers */
uint16_t PSRAM_TxBuffer[PSRAM_BUFFER_SIZE];
/* Status variables */
__IO uint32_t uwWriteReadStatus = 0;
/* Counter index */
uint32_t uwIndex = 0;
Fill_Buffer(PSRAM_TxBuffer, PSRAM_BUFFER_SIZE, WRITING_OFFSET); // FUNCTION TO FILL TXBUFFER WITH DATA
HAL_SRAM_Write_16b(&hsram3, (uint32_t *)(PSRAM_BANK_ADDR + WRITE_READ_ADDR), PSRAM_TxBuffer, PSRAM_BUFFER_SIZE);Could someone clarify what is #define WRITE_READ_ADDR ((uint32_t)0x0800) used for? I was able to confirm that the peripheral address of FSMC is 0x6000000000 which is fine, however, I cannot seem to understand why do we have to 0x0800 (READ_WRITE_ADDRESS) to the peripheral adress when writing some data to external PSRAM device? I have not been able to find any relavant information on that in either the stm32 datasheet or the external PSRAM datasheet.
