I'm stuck with an IC that has an Active High power down input. We are currently seeing some behavior that I believe is attributed to lack of a pulldown and EM events raising the input above the switching region. Any suggestions on an ESD solution for an active high reset line? I'm thinking something like the following:

 

It would help if you gave us all relevant circuit details. Like which IC and some sort of schematic

 

It would help if you gave us all relevant circuit details. Like which IC and some sort of schematic

IC datasheet is not available to general public.

3.3V power down input, if it is high, device clock is halted and counters are reset. No other information available on the data sheet, ie timing but I can envision this line breaking the threshold and intermittently disabling the device.

Currently, input is driven by NC7WZ14 approximately 4 ft away, nothing else holding the line low.

Sorry I don't have more info to provide..

 

How fast does need to respond to a power down event, could you use a RC filter on the input.

 

What is the input impedance of the power-down pin? Are we talking CMOS or ....?

 

A pull-down resistor?

Why don't you have a pull down resistor on a 4 foot long wire to a critical function IC input?

Capacitors can be useful things too.

 

How fast does need to respond to a power down event, could you use a RC filter on the input.

Not sure, garbage data sheet does not give a requirement for the time this pin needs to be high.

What is the input impedance of the power-down pin? Are we talking CMOS or ....?

Again does not say, All i've got is data for 1.8V logic, 1.26V min VIH, 0.54 max VIL, 10 pf CIN.

A pull-down resistor?

Why don't you have a pull down resistor on a 4 foot long wire to a critical function IC input?

Capacitors can be useful things too.

Agreed, that's my first order of business, tacking a pulldown near the chip, there is some internal pulldown referenced, but I'm sure it's something like 100k.

I was handed this circuit and am trying to fix it. Thanks for your help!

 

a resistor of fairly high value, not enough current to effect the circuit, is a good idea on input lines, a little load will keep static from building up and load down spikes.

 

a resistor of fairly high value, not enough current to effect the circuit, is a good idea on input lines, a little load will keep static from building up and load down spikes.

So just the pull down?

 

If the fucntion of the pin is slow (like a stable ON/OFF mode) it is a great idea to add a cap there too, from the pin to ground, close to the chip.

0.1uF is ok. Larger can be better especially if you have been getting issues of noise spikes on that line.

 

If the fucntion of the pin is slow (like a stable ON/OFF mode) it is a great idea to add a cap there too, from the pin to ground, close to the chip.

0.1uF is ok. Larger can be better especially if you have been getting issues of noise spikes on that line.

Just measured the line back at the driver, 15ns rise up to ~2.9V, doesn't cause immediate disable but eventually, maybe 5-10 pulses, and it disables the stream.

I'll drop a 3.74k in parallel with a 1uF, this is a critical piece of our system