edge triggered ff with clear

WBahn

Joined Mar 31, 2012
29,979
Well, is your clear active-HI or active-LO? It is your design, after all. Isn't it?

You will want to assert the clear at the beginning of your simulation otherwise your sim might not converge. That or put initial conditions on the charge storage nodes.

You should also take your ideal signal sources and pass them through buffers so that you get realistic rise/fall times and current drive capabilities. If you don't, this can cause simulation problems if the rapid charge injection causes excessive voltage spikes.
 

WBahn

Joined Mar 31, 2012
29,979
Also, I haven't analyzed your design, but it still looks like a master-slave arrangement that will NOT lead to the behavior that you described you were looking for previously, namely that the output changes on the same edge that captures the input.

Have you looked at the Wikipedia article on flip flops?
 
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