eagle board dimension error from a board

Thread Starter

devilesence

Joined Oct 17, 2009
3
hello i am using a stellaris launchpad XL package from StellarisLaunchPad_Fred library. and i am getting this dimension error while routing although the board only has the header footprints on the layer itself and the border or the dimensions are floating above the wires on top layer.
1.what does this error mean.
2.would it cut down the wire on the marked errors?
3.how can i avoid this error in the first place.

following are the images of the error.
board.jpg board1.jpg
 

jpanhalt

Joined Jan 18, 2008
11,088
Welcome to AAC.

The most likely cause for DRG errors that you can't see is that your settings for the DRG are incorrect. Sometimes an error (like a clearance or overlap from a via on a pad) will be intentional. The board shop I use will accept those errors and make the board.

Can you attach the brd file? It may attach directly, or you can attach it as a zip.

John
 

Thread Starter

devilesence

Joined Oct 17, 2009
3
thankyou very much to the welcome. the file cant be uploaded though i have attached a link to it . i just found out that dimensions are just for the boundaries for the final boards and not for the components but the maker of library for this package accidently put on the dimensions on the border. so whenever the signal crosses the dimension there is an error . the point is now what should i use for the border then and better if i can still mill this board approving these errors and not cutting out the routes under the dimension error.https://www.dropbox.com/s/a11c7hr956zqi6p/thesisboard23563.brd?dl=0
 

jpanhalt

Joined Jan 18, 2008
11,088
It appears that is actually a device (show all layers, right click the origin in the upper left corner, click properties). You cannot modify it without access to the library it is in, which is included with the schematic.

I am not sure you need to get rid of the "dimension" layer (see next paragraph), but if you do, open the library "StellarisLaunchPad_Fred" and edit the outline. Something like t-place or document might work fine. T-place may create problems with other components on the same layer that are within its borders. A document or reference layer shouldn't have that problem. The package name is something like Package Launchpad_XL.

It appears the author wanted to have something like a piggyback board on a board. Without having seen what the devices look like, I am at a bit of a disadvantage. It is possible the piggyback board has pins and the connectors are on the main board or visa verse. The piggyback board may even be soldered to the main board. If any of those are the case, you may want to create two boards, a launch pad board and a second board with everything else on it.

John
 

Thread Starter

devilesence

Joined Oct 17, 2009
3
Yea thanks . i tried changing the dimension layer in the library to tplace and replaced the component in the schematics and it worked .
 
Top