Dual rail op-amp fails

Thread Starter

etech7

Joined Jun 9, 2015
46
Hi,
I'm working on building an SPWM inverter using arduino mini. I wanted to measure both charging and discharging current using a shunt. As shunt is on negative side on the battery, arduino can't directly measure the shunt voltage during charging time. So i built an op-amp circuit with dual rail supply using capacitor pumping circuit for negative rail. here is the schematic diagram. Read VCC here as 14V battery/bench power supply voltage from the inverter circuit, it's not the same as VCC on the inverter diagram. VCC on the inverter circuit is a separate 12V supply.
The OUT is connected to mini's A2 pin. Mini is taking power from 5V regulator output from inverter circuit. I don't have diagram for mini now.
SCH_Schematic1_1-P1_2026-05-26.png
Here is my invereter diagram: As i'm not using U1 anymore, I shorted CurrentSense' with CurrentSense (pin 6 of INV_CTRL header). High side mosfets' drain terminals are shorted externally by heatsink, than 14V supply is applied through the heatsink. VCC is separate a 12V supply from other dc source as I said earlier. Sheet_1.png
Sheet_2.png
Now the problem is tl084 burned for first time and 555 timer stopped working as well (checked o/p using oscilloscope. no oscillation at pin 3). after replacing both ICs, it worked fine, around 22VDC across tl084, 555 timer oscillating. second time after connecting to inverter cuicuit, and A2 pin on mini, 555 burned cosuming around 220 mA, I didn't checked tl084, didn't try any further attempt. Now I'm wondering why this is failing?I did built and tested this circuit, i.e. op-amp circuit, couple of months ago, and it worked just fine. That time supply for op-amp circuit was 12V from inverter circuit as far i can remeber, and the CurrentSense' - CurrentSense was not shorted. I took input to op-amp circuit from CrrentSense' directly.
Thank you all for reading this thread.
 

ronsimpson

Joined Oct 7, 2019
4,703
I like the large schematics. I can read the values. Good.

I am trying to understand how this works. It appears U3 makes a negativity supply for U1.1.
I have not found "IN".
1779800808477.png
CurrSense is like this. It is hard to follow the flow of electrons.
1779800893303.png
I have no idea what kills U1 but the input has no protection. With out knowing what "IN" is I cannot say for certain. I think you should open up U1.1-pin-3 and add a 1k to 10k resistor that limits the current into pin 3. It could be that (at power up or down) the signal going into pin 3 pushes into AGND or VCC and blows up the input protection diodes inside U1.
1779801076298.png
 

Thread Starter

etech7

Joined Jun 9, 2015
46
I really appreciate your time reading this thread, and I apologise for late reply.

I have not found "IN".
I apologise that I mistakenly forgot about IN. I made this schematic after the U1 from inverter schematic - which is the second schematic in this thread - failed for measuring current.
IN in the first schematic is connected to CurrentSense from RS2 and RS1 (from second schematic), which are two shunts of value 20m ohm for measuring battery current. CurrentSense is the measuring node for measuring voltage drop across shunt. As, the voltage at this point goes below GND reference point during charging the battery, atmega328p chip could not measure that voltage. so, I planed to use dual rail op-amp and clamping the output around 2.5v. so the output will be 2.5v while no current flows, >2.5v while discharging, <2.5v while charging. I tried ACS712 module to measure the current as weel but no output as the current value changes, i.e. always 2.5v at output.

I have no idea what kills U1 but the input has no protection. With out knowing what "IN" is I cannot say for certain. I think you should open up U1.1-pin-3 and add a 1k to 10k resistor that limits the current into pin 3. It could be that (at power up or down) the signal going into pin 3 pushes into AGND or VCC and blows up the input protection diodes inside U1.
Thinking of reason behind blowing ICs, it seems to me that - as I took 14V from mosfet drain, which may generating high voltage spike during spwm switching, causing overvoltage across 555 timer and tl084 op-amp ICs, and destroying them.
Also voltage at IN or CurrentSense' is very near arround GND in the op-amp schematic, so there are little chance that the voltage at pin 3 will frying up tl084.

Anyway, this circuit is not doing very much as well. The output is not so reliable or the chip tl084 is also faulty last time 555 timer ic was blown. Recently I used a center tapped transformer (9v-0-9v) dual rail supply instead of 555 timer and capacitor pumping circuit for negative bias to AGND.
 

Thread Starter

etech7

Joined Jun 9, 2015
46
It would be helpful to the community if you redrew the schematic. Reading blocks is difficult and gives no sense of the signal flow. Remove the net names and join the wires. You may understand it but we can’t.
I understand the shematics are so messed up. I will try redraw the schematics and edit if i can.
Thank you <
 

ChasNC

Joined Jul 14, 2020
6
Hello Etech7,

I have several suggestions, starting with the same suggestions as ronsimpson and kaindub. When conveying your design ideas to others, communication is very important and in PCB designs, that starts with well thought out PCB schematic design. If you want others to help, you have to help them understand what the design easily, such as PSU labels and signal labels, and even simple notes by related sections. When I make my schematics to collaborate with others in a design review of my system, I try to bring them up to speed quickly. GE had a study on this many many years ago and they found that schematic quality directly affected how long a project took, and how much got spent on redesign loops (materials and engineering time). I would start with changing the AGND supply rail to indicate that it is the negative analog supply (VSS?).

The second thing that I noted was exactly what I went through early in my design career: we are taught to think about things in ideal terms and never told to throw that away when you do real design. So the op-amp is not ideal, the PSU is not ideal, the other ICs are not ideal, and the caps and resistors are not ideal. You can think ideal when concepting things, then go into "non-ideal" mode to see what can hurt you.

Your 555 appears to be used as a charge pump to make your negative rail and it has a push-pull output that can drive fairly high currents, but I don't think it is thermally protected so if you overload it, the 555 will cook. Check that. How hot is it getting? Also, charge pump circuits are notorious for creating large voltage spikes, so any poorly filtered or clamped rails will let those spikes go right into the ICs. For this reason, decoupling caps are crucial. The op-amps need caps across the supply pins directly by the IC (Vcc to Vss), and they should be filtered to the local ground also.

In general, never connect op-amp inputs directly to supply or ground rails without resistors. You want to impedance match the input resistances anyway to help with balancing the input bias currents/voltages. The input resistors also limits the currents that the internal ESD protection diodes on the inputs during supply spikes and ESD events.

Last note from a seasoned power electronics guy: Whenever you use a current sensor of any type, be thinking about fault currents and how to protect your sensing circuit during a severe overload. Many of the initial residential electronic power meters missed that, with a high number of field failures (as well as fires from other issues). That philosophy is important for any good design: what happens when faults or abuse happens? User abuse as well. The user will smoke your stuff up faster than you can say "I want another fuse, please."

Best regards,
Charles
 

ronsimpson

Joined Oct 7, 2019
4,703
C_S has no function. A 223 cap across 10m Ohms does nothing. It is likely the internal resistance of the cap is more than 10m Ohms.
If you wanted to remove some high frequencies from the "IN" signal use a RC low pass filter, not just a C.
1780096962552.png
I don't see the function of U1.1. You stated the "IN" is a little negative. U1.1 pin-1 will also be a little negative. I think you can remove U1.1 and connect IN to R1. R1 will help protect the input from large voltages.
1780097214794.png
U1.2 gives you a gain of 12 and inverts the signal.
U1.3 inverts and gives an offset.
 

ronsimpson

Joined Oct 7, 2019
4,703
I make a diff amp. The "IN" signal is 100mV peak, centered on 0V.
The 0.208V is an offset to get 0V to be 2.5V.
The signal is inverted. If you want to not have inverted switch V2 and V4.
1780104355576.png
 

ci139

Joined Jul 11, 2016
1,995
what is the 5V LDO chip -- it seems to drop 7V usually it's 1.8 to 2.8 V depending on load current that would be normal

the 1k for LM339 @ 5V is indeed the fastest responce - however the below/equal to 1 mA or 5k1 as at d/s example circuits would likely give better rising falling slope times ratio . . . perhaps

i wouldn't trust LM358 at ground (read negative-rail) sensing (the output imbalance -e.g.- the output-zero offset may be negative...)
... also it has low SR and BW - and you have it direct coupled to a sense shunt ...
+ although it's quite a "tolerant" chip - the 33R to feedback may make it "noisy" (from swithed waveform at shunt - which it does not integrate)

the 555 even at dip-8 gets hot fast with increasing frequency and output loading
at some circumstances the C2 to MOD (pin-5) may induce ringing insted of supressing it - you should scope that pin - adj/remove C2
// MC33063 or alternative thing with inverting output could be a better choice?
 

Ian0

Joined Aug 7, 2020
13,144
Why not use a current-sense amplifier such as an INA181 or AD8418. They have a reference pin which can be connected to half supply so that positive currents are between 2.5V and 5V, and negative currents are between 2.5V and 0V, and you don't need a negative supply at all.
 
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