Once again I need your opinion:
I have two H Bridges, double N-FET hanging on a 3V bus in a full-bridge configuration. The goal is to be able to supply the resistive load that is connected to the bridge with current in both directions, depending on whether the output of a LM555 is high or low.
Having also a 15V supply line available, what would be a simple way of driving the bridge?
If I just used two complementary (N and P) FETs as gate drivers for the bridge, switching two of the bridge-FETs each, in a complementary manner (meaning the P-FET switches A1 and B2 and the N-FET switches A2 and B1, A and B being the branches of the bridge), i have the problem of a possible shoot-through in the bridge because of lacking dead time control.
I then came up with the following solution:
Charge the gates of the "driver FETs" through a resistor (lets assume it to be 1kΩ) to delay the "on" signal but discharge the gate through a schottky-diode, giving minimal delay for the switch-off voltage.
Could this work? Do I need a pull-up (P-FET) and pull-down (N-FET) resistor on the gates to properly reference the gate voltage?
I have two H Bridges, double N-FET hanging on a 3V bus in a full-bridge configuration. The goal is to be able to supply the resistive load that is connected to the bridge with current in both directions, depending on whether the output of a LM555 is high or low.
Having also a 15V supply line available, what would be a simple way of driving the bridge?
If I just used two complementary (N and P) FETs as gate drivers for the bridge, switching two of the bridge-FETs each, in a complementary manner (meaning the P-FET switches A1 and B2 and the N-FET switches A2 and B1, A and B being the branches of the bridge), i have the problem of a possible shoot-through in the bridge because of lacking dead time control.
I then came up with the following solution:
Charge the gates of the "driver FETs" through a resistor (lets assume it to be 1kΩ) to delay the "on" signal but discharge the gate through a schottky-diode, giving minimal delay for the switch-off voltage.
Could this work? Do I need a pull-up (P-FET) and pull-down (N-FET) resistor on the gates to properly reference the gate voltage?