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I really don't understand this at all. So confusing.
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first picture is manual of those two instr. Second is my exercise where I need to fill it if it is F/E, which reg and so on. Can someone tell me if this is good?

I wrote that it has only one cycle of fetch because they have value of 1 byte and there is nothing to execute, I think, not understanding fetch cycle good, so I put that it doesn't have it

See attached image...

 

View attachment 99084


See attached image...

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I get that, but on my test I won't have those infos. Only how many bytes has instruction and opcode.

 

I get that, but on my test I won't have those infos. Only how many bytes has instruction and opcode.

Hi,

That's strange. But if true, then you'll have to try to find a correlation between the byte count and type of instruction and the T states. The values in parens might help: (4,4,3,3) so you could look at that for each instruction and see how it relates to the byte count and whatever else you get as info for a test.
I am surprised to hear that you cant use the manual though. That's what any engineer would do.

 

Hi,

That's strange. But if true, then you'll have to try to find a correlation between the byte count and type of instruction and the T states. The values in parens might help: (4,4,3,3) so you could look at that for each instruction and see how it relates to the byte count and whatever else you get as info for a test.
I am surprised to hear that you cant use the manual though. That's what any engineer would do.

We get manual but only what is written is number of bytes for example ADD A 1 byte and opcode.

 

Hi,

Ok then probably they know of a correlation already. All you have to do is look at several instructions and think about what kind they are and why they need (say) 4 T states instead of 3 for example, and that will probably tell you want you need to know.
For example, maybe 4 to read the first op code, 4 more for the second op code, so probably any instruction that has to read an op code has 4 bytes to start, then maybe 3 to increment the program counter, maybe 3 to increment the stack pointer, but i am just guessing. Once you know that though, then if you know what the instruction does then you can add up the T states like they did in the manual.
So instructions should be very fast because they dont have to do as much, and they will be in a separate class from the POP instructions, and jump instructions are probably in a different class as all they do is add something to the program counter after reading how much to add to it from the memory.
You'll see a pattern emerge as you look for these correlations.

 

Hi,

Ok then probably they know of a correlation already. All you have to do is look at several instructions and think about what kind they are and why they need (say) 4 T states instead of 3 for example, and that will probably tell you want you need to know.
For example, maybe 4 to read the first op code, 4 more for the second op code, so probably any instruction that has to read an op code has 4 bytes to start, then maybe 3 to increment the program counter, maybe 3 to increment the stack pointer, but i am just guessing. Once you know that though, then if you know what the instruction does then you can add up the T states like they did in the manual.
So instructions should be very fast because they dont have to do as much, and they will be in a separate class from the POP instructions, and jump instructions are probably in a different class as all they do is add something to the program counter after reading how much to add to it from the memory.
You'll see a pattern emerge as you look for these correlations.

Doesn't help me, but thanx

 

For example
MOV [HL], A
Fetch 0000h It goes from memory to instruction reg, value 77h
Execute In Memory bus it goes from A to MEM

MOV label, HL
Fetch 0000h It goes from MEM to IR, value 22h
Fetch 0001h It goes from MEM to ZR_lo
Fetch 0002h It goes from MEM to ZR_hi
Execute ZR It goes from HL_lo MEM
Execute ZR It goes from HL_hi MEM

How do I know how much I'll have execute cycles, how do I know if I'm going to have execute at all and where it will start?

Can someone do for instruction ROR and POP?
In my case I don't see execute cycle there at all

POP qq is 1 Fetch and two Read and Write for three machine cycles.
POP IX? Does that use two Fetch cycles?

 

I don't understand how do I know from that does it have execute or not?

All instructions I can think of have an execute cycle except maybe NOP.

 

Thexy, your manual is incomplete in regards to the timing of instructions. Or at least the portion you copied is incomplete. Maybe the timing information is elsewhere in the manual. Get a copy of this manual and study it: UM0080.pdf
Find the POP instruction on page 117. After the description of the instruction there is a note showing how many M states and how many T states the instruction requires.
Now look at Figure 4 on page 8. That shows what the M states and T states are for a complete machine instruction.